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soc/intel/tgl: move DIMM_SPD_SIZE from mb to SoC Kconfig 

All TGL mainboards are setting DIMM_SPD_SIZE to 512. Thus, default to
512 in the SoC Kconfig and drop it from the mainboard Kconfigs.

Change-Id: I9fd947b61c984e10bd5fba20b73280b08623a008
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62766
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2022-03-13 20:08:55 +01:00 committed by Felix Held
parent bba7e601a8
commit d3b85223fd
10 changed files with 3 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/google/deltaur/Kconfig
View File

@ -36,9 +36,6 @@ config CHROMEOS
select GBB_FLAG_FORCE_DEV_BOOT_USB select GBB_FLAG_FORCE_DEV_BOOT_USB
select GBB_FLAG_FORCE_DEV_SWITCH_ON select GBB_FLAG_FORCE_DEV_SWITCH_ON
config DIMM_SPD_SIZE
default 512
config DEVICETREE config DEVICETREE
default "variants/baseboard/devicetree.cb" default "variants/baseboard/devicetree.cb"

3
src/mainboard/google/volteer/Kconfig
View File

@ -144,9 +144,6 @@ config CHROMEOS_WIFI_SAR
select SAR_ENABLE select SAR_ENABLE
select USE_SAR select USE_SAR
config DIMM_SPD_SIZE
default 512
config DEVICETREE config DEVICETREE
default "variants/baseboard/devicetree.cb" default "variants/baseboard/devicetree.cb"

3
src/mainboard/intel/tglrvp/Kconfig
View File

@ -60,9 +60,6 @@ config MAINBOARD_FAMILY
config DEVICETREE config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE
default 512
choice choice
prompt "ON BOARD EC" prompt "ON BOARD EC"
default TGL_CHROME_EC default TGL_CHROME_EC

3
src/mainboard/starlabs/labtop/Kconfig
View File

@ -46,9 +46,6 @@ if BOARD_STARLABS_LABTOP_SERIES
config DEVICETREE config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
config DIMM_SPD_SIZE
default 512
config DRIVER_TPM_SPI_CHIP config DRIVER_TPM_SPI_CHIP
default 2 default 2

3
src/mainboard/system76/darp7/Kconfig
View File

@ -44,9 +44,6 @@ config CBFS_SIZE
config CONSOLE_POST config CONSOLE_POST
default y default y
config DIMM_SPD_SIZE
default 512
config POST_DEVICE config POST_DEVICE
default n default n

3
src/mainboard/system76/galp5/Kconfig
View File

@ -43,9 +43,6 @@ config CBFS_SIZE
config CONSOLE_POST config CONSOLE_POST
default y default y
config DIMM_SPD_SIZE
default 512
config ONBOARD_VGA_IS_PRIMARY config ONBOARD_VGA_IS_PRIMARY
default y default y

3
src/mainboard/system76/gaze16/Kconfig
View File

@ -55,9 +55,6 @@ config CBFS_SIZE
config CONSOLE_POST config CONSOLE_POST
default y default y
config DIMM_SPD_SIZE
default 512
config ONBOARD_VGA_IS_PRIMARY config ONBOARD_VGA_IS_PRIMARY
default y default y

3
src/mainboard/system76/lemp10/Kconfig
View File

@ -44,9 +44,6 @@ config CBFS_SIZE
config CONSOLE_POST config CONSOLE_POST
default y default y
config DIMM_SPD_SIZE
default 512
config POST_DEVICE config POST_DEVICE
default n default n

3
src/mainboard/system76/oryp8/Kconfig
View File

@ -49,9 +49,6 @@ config CONSOLE_POST
config DIMM_MAX config DIMM_MAX
default 4 default 4
config DIMM_SPD_SIZE
default 512
config ONBOARD_VGA_IS_PRIMARY config ONBOARD_VGA_IS_PRIMARY
default y default y

3
src/soc/intel/tigerlake/Kconfig
View File

@ -94,6 +94,9 @@ config MAX_CPUS
default 16 if SOC_INTEL_TIGERLAKE_PCH_H default 16 if SOC_INTEL_TIGERLAKE_PCH_H
default 8 default 8
config DIMM_SPD_SIZE
default 512
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
default 0xfef00000 default 0xfef00000