soc/intel/tgl: move DIMM_SPD_SIZE from mb to SoC Kconfig
All TGL mainboards are setting DIMM_SPD_SIZE to 512. Thus, default to 512 in the SoC Kconfig and drop it from the mainboard Kconfigs. Change-Id: I9fd947b61c984e10bd5fba20b73280b08623a008 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62766 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -36,9 +36,6 @@ config CHROMEOS
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select GBB_FLAG_FORCE_DEV_BOOT_USB
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select GBB_FLAG_FORCE_DEV_SWITCH_ON
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config DIMM_SPD_SIZE
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default 512
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config DEVICETREE
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default "variants/baseboard/devicetree.cb"
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@ -144,9 +144,6 @@ config CHROMEOS_WIFI_SAR
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select SAR_ENABLE
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select USE_SAR
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config DIMM_SPD_SIZE
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default 512
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config DEVICETREE
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default "variants/baseboard/devicetree.cb"
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@ -60,9 +60,6 @@ config MAINBOARD_FAMILY
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config DEVICETREE
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default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config DIMM_SPD_SIZE
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default 512
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choice
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prompt "ON BOARD EC"
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default TGL_CHROME_EC
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@ -46,9 +46,6 @@ if BOARD_STARLABS_LABTOP_SERIES
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config DEVICETREE
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default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
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config DIMM_SPD_SIZE
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default 512
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config DRIVER_TPM_SPI_CHIP
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default 2
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@ -44,9 +44,6 @@ config CBFS_SIZE
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config CONSOLE_POST
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default y
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config DIMM_SPD_SIZE
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default 512
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config POST_DEVICE
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default n
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@ -43,9 +43,6 @@ config CBFS_SIZE
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config CONSOLE_POST
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default y
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config DIMM_SPD_SIZE
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default 512
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config ONBOARD_VGA_IS_PRIMARY
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default y
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@ -55,9 +55,6 @@ config CBFS_SIZE
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config CONSOLE_POST
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default y
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config DIMM_SPD_SIZE
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default 512
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config ONBOARD_VGA_IS_PRIMARY
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default y
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@ -44,9 +44,6 @@ config CBFS_SIZE
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config CONSOLE_POST
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default y
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config DIMM_SPD_SIZE
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default 512
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config POST_DEVICE
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default n
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@ -49,9 +49,6 @@ config CONSOLE_POST
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config DIMM_MAX
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default 4
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config DIMM_SPD_SIZE
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default 512
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config ONBOARD_VGA_IS_PRIMARY
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default y
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@ -94,6 +94,9 @@ config MAX_CPUS
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default 16 if SOC_INTEL_TIGERLAKE_PCH_H
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default 8
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config DIMM_SPD_SIZE
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default 512
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config DCACHE_RAM_BASE
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default 0xfef00000
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