AMD K8: Move SB_HT_CHAIN_ON_BUS0 default 0

Define the default value under northbridge. The list of boards this
patchset touches will change to use SB_HT_CHAIN_ON_BUS0 with
follow-up patch.

Based on code analysis, these boards already scan system bus
as the first (active) HT chain, so it is placed as bus 0
even when this option was not explicitly selected.

Change-Id: I5a00d6372cb89151940aeee517ea613398825c78
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8353
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
Kyösti Mälkki 2015-02-05 14:05:51 +02:00
parent 04b1fc8669
commit d44a03622e
12 changed files with 4 additions and 44 deletions

View File

@ -43,10 +43,6 @@ config MAX_PHYSICAL_CPUS
int int
default 1 default 1
config SB_HT_CHAIN_ON_BUS0
int
default 0
config HT_CHAIN_END_UNITID_BASE config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20

View File

@ -43,10 +43,6 @@ config MAX_PHYSICAL_CPUS
int int
default 2 default 2
config SB_HT_CHAIN_ON_BUS0
int
default 0
config HT_CHAIN_END_UNITID_BASE config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20

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@ -37,10 +37,6 @@ config MAX_PHYSICAL_CPUS
int int
default 2 default 2
config SB_HT_CHAIN_ON_BUS0
int
default 0
config HT_CHAIN_END_UNITID_BASE config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20

View File

@ -36,10 +36,6 @@ config MAX_PHYSICAL_CPUS
int int
default 2 default 2
config SB_HT_CHAIN_ON_BUS0
int
default 0
config HT_CHAIN_END_UNITID_BASE config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20

View File

@ -30,10 +30,6 @@ config APIC_ID_OFFSET
hex hex
default 0x0 default 0x0
config SB_HT_CHAIN_ON_BUS0
int
default 0
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "Khepri" default "Khepri"

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@ -40,10 +40,6 @@ config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20
config SB_HT_CHAIN_ON_BUS0
int
default 0
config APIC_ID_OFFSET config APIC_ID_OFFSET
hex hex
default 0x0 default 0x0

View File

@ -42,10 +42,6 @@ config HT_CHAIN_END_UNITID_BASE
hex hex
default 0x20 default 0x20
config SB_HT_CHAIN_ON_BUS0
int
default 0
config APIC_ID_OFFSET config APIC_ID_OFFSET
hex hex
default 0x0 default 0x0

View File

@ -22,10 +22,6 @@ config APIC_ID_OFFSET
hex hex
default 0x0 default 0x0
config SB_HT_CHAIN_ON_BUS0
int
default 0
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "S2880" default "S2880"

View File

@ -23,10 +23,6 @@ config APIC_ID_OFFSET
hex hex
default 0x0 default 0x0
config SB_HT_CHAIN_ON_BUS0
int
default 0
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "S2882" default "S2882"

View File

@ -30,10 +30,6 @@ config APIC_ID_OFFSET
hex hex
default 0x10 default 0x10
config SB_HT_CHAIN_ON_BUS0
int
default 0
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "S4880" default "S4880"

View File

@ -30,10 +30,6 @@ config APIC_ID_OFFSET
hex hex
default 0x10 default 0x10
config SB_HT_CHAIN_ON_BUS0
int
default 0
config MAINBOARD_PART_NUMBER config MAINBOARD_PART_NUMBER
string string
default "S4882" default "S4882"

View File

@ -64,6 +64,10 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool bool
default n default n
config SB_HT_CHAIN_ON_BUS0
int
default 0
config QRANK_DIMM_SUPPORT config QRANK_DIMM_SUPPORT
bool bool
default n default n