Remove old ACPI code
it isn't used anywhere, and could be fetched from git/svn history if needed. Change-Id: Iaa2ba39af531d0389d7ab1110263ae7ecaa35c70 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/35 Tested-by: build bot (Jenkins)
This commit is contained in:
Sven Schnelle
parent
d8c68a9d08
commit
d4dc9a5a03
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@ -30,84 +30,13 @@
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#include <arch/ioapic.h>
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#include "dmi.h"
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#define OLD_ACPI 0
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extern const unsigned char AmlCode[];
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#if CONFIG_HAVE_ACPI_SLIC
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unsigned long acpi_create_slic(unsigned long current);
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#endif
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#if OLD_ACPI
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typedef struct acpi_oemb {
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acpi_header_t header;
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u8 ss;
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u16 iost;
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u32 topm;
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u32 roms;
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u32 mg1b;
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u32 mg1l;
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u32 mg2b;
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u32 mg2l;
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u8 rsvd;
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u8 dmax;
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u32 hpta;
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u32 cpb0;
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u32 cpb1;
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u32 cpb2;
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u32 cpb3;
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u8 assb;
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u8 aotb;
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u32 aaxb;
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u8 smif;
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u8 dtse;
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u8 dts1;
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u8 dts2;
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u8 mpen;
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} __attribute__((packed)) acpi_oemb_t;
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#endif
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#include "southbridge/intel/i82801gx/nvs.h"
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#if OLD_ACPI
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static void acpi_create_oemb(acpi_oemb_t *oemb)
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{
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acpi_header_t *header = &(oemb->header);
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unsigned long tolud;
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memset (oemb, 0, sizeof(*oemb));
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/* fill out header fields */
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memcpy(header->signature, "OEMB", 4);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, "COREBOOT", 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->length = sizeof(acpi_oemb_t);
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header->revision = 1;
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oemb->ss = 0x09; // ss1 + ss 4
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oemb->iost = 0x0403; // ??
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tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
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oemb->topm = tolud;
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oemb->roms = 0xfff00000; // 1M hardcoded
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oemb->mg1b = 0x000d0000;
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oemb->mg1l = 0x00010000;
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oemb->mg2b = tolud;
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oemb->mg2l = 0-tolud;
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oemb->dmax = 0x87;
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oemb->hpta = 0x000e36c0;
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header->checksum =
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acpi_checksum((void *) oemb, sizeof(acpi_oemb_t));
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};
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#endif
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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memset((void *)gnvs, 0, sizeof(*gnvs));
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@ -201,9 +130,6 @@ unsigned long write_acpi_tables(unsigned long start)
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acpi_facs_t *facs;
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#if CONFIG_HAVE_ACPI_SLIC
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acpi_header_t *slic;
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#endif
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#if OLD_ACPI
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acpi_oemb_t *oemb;
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#endif
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acpi_header_t *ssdt;
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acpi_header_t *dsdt;
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@ -256,15 +182,6 @@ unsigned long write_acpi_tables(unsigned long start)
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ALIGN_CURRENT;
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acpi_add_table(rsdp, mcfg);
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#if OLD_ACPI
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printk(BIOS_DEBUG, "ACPI: * OEMB\n");
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oemb=(acpi_oemb_t *)current;
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current += sizeof(acpi_oemb_t);
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ALIGN_CURRENT;
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acpi_create_oemb(oemb);
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acpi_add_table(rsdp, oemb);
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#endif
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printk(BIOS_DEBUG, "ACPI: * FACS\n");
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facs = (acpi_facs_t *) current;
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current += sizeof(acpi_facs_t);
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@ -276,16 +193,6 @@ unsigned long write_acpi_tables(unsigned long start)
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current += dsdt->length;
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memcpy(dsdt, &AmlCode, dsdt->length);
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#if OLD_ACPI
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for (i=0; i < dsdt->length; i++) {
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if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBEEF) {
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printk(BIOS_DEBUG, "ACPI: Patching up DSDT at offset 0x%04x -> 0x%08x\n", i, 0x24 + (u32)oemb);
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*(u32*)(((u32)dsdt) + i) = 0x24 + (u32)oemb;
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break;
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}
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}
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#endif
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ALIGN_CURRENT;
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/* Pack GNVS into the ACPI table area */
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@ -36,61 +36,6 @@ extern const unsigned char AmlCode[];
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unsigned long acpi_create_slic(unsigned long current);
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#endif
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#define OLD_ACPI 0
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#if OLD_ACPI
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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memset (gnvs, 0, sizeof(global_nvs_t));
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gnvs->LIDS = 1;
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gnvs->PWRS = 1;
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gnvs->ACTT = 0x37;
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gnvs->PSVT = 0x4f;
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gnvs->TC1V = 0x00;
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gnvs->TC2V = 0x0a;
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gnvs->TSPV = 0x02;
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gnvs->CRTT = 0x77;
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gnvs->B0SC = 0x54;
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gnvs->APIC = 0x01;
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gnvs->MPEN = 0x01;
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gnvs->PPCM = 0x02;
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gnvs->PCP0 = 0xbf;
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gnvs->PCP1 = 0xbf;
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gnvs->CMAP = 0x01;
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gnvs->CMBP = 0x01;
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gnvs->LT0 = 0x01;
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gnvs->FDCP = 0x01;
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gnvs->CMCP = 0x01;
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gnvs->CMDP = 0x01;
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gnvs->P2M = 0x02;
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gnvs->IGDS = 0x01;
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gnvs->CADL = 0x09;
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gnvs->PADL = 0x09;
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gnvs->NDID = 3;
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gnvs->DID1 = 0x80000100;
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gnvs->DID2 = 0x80000240;
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gnvs->DID3 = 0x80000410;
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gnvs->DID4 = 0x80000410;
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gnvs->DID5 = 0x00000005;
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gnvs->ALAF = 0x64;
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gnvs->LLOW = 0x2c;
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gnvs->LHIH = 0x01;
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// tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
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// oemb->topm = tolud;
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}
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#endif
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#include "southbridge/intel/i82801gx/nvs.h"
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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@ -36,61 +36,6 @@ extern const unsigned char AmlCode[];
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unsigned long acpi_create_slic(unsigned long current);
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#endif
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#define OLD_ACPI 0
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#if OLD_ACPI
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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memset (gnvs, 0, sizeof(global_nvs_t));
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gnvs->LIDS = 1;
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gnvs->PWRS = 1;
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gnvs->ACTT = 0x37;
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gnvs->PSVT = 0x4f;
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gnvs->TC1V = 0x00;
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gnvs->TC2V = 0x0a;
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gnvs->TSPV = 0x02;
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gnvs->CRTT = 0x77;
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gnvs->B0SC = 0x54;
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gnvs->APIC = 0x01;
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gnvs->MPEN = 0x01;
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gnvs->PPCM = 0x02;
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gnvs->PCP0 = 0xbf;
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gnvs->PCP1 = 0xbf;
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gnvs->CMAP = 0x01;
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gnvs->CMBP = 0x01;
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gnvs->LT0 = 0x01;
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gnvs->FDCP = 0x01;
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gnvs->CMCP = 0x01;
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gnvs->CMDP = 0x01;
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gnvs->P2M = 0x02;
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gnvs->IGDS = 0x01;
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gnvs->CADL = 0x09;
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gnvs->PADL = 0x09;
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gnvs->NDID = 3;
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gnvs->DID1 = 0x80000100;
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gnvs->DID2 = 0x80000240;
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gnvs->DID3 = 0x80000410;
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gnvs->DID4 = 0x80000410;
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gnvs->DID5 = 0x00000005;
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gnvs->ALAF = 0x64;
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gnvs->LLOW = 0x2c;
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gnvs->LHIH = 0x01;
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// tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
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// oemb->topm = tolud;
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}
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#endif
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#include "southbridge/intel/i82801gx/nvs.h"
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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@ -36,61 +36,6 @@ extern const unsigned char AmlCode[];
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unsigned long acpi_create_slic(unsigned long current);
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#endif
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#define OLD_ACPI 0
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#if OLD_ACPI
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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memset (gnvs, 0, sizeof(global_nvs_t));
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gnvs->LIDS = 1;
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gnvs->PWRS = 1;
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gnvs->ACTT = 0x37;
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gnvs->PSVT = 0x4f;
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gnvs->TC1V = 0x00;
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gnvs->TC2V = 0x0a;
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gnvs->TSPV = 0x02;
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gnvs->CRTT = 0x77;
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gnvs->B0SC = 0x54;
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gnvs->APIC = 0x01;
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gnvs->MPEN = 0x01;
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gnvs->PPCM = 0x02;
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gnvs->PCP0 = 0xbf;
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gnvs->PCP1 = 0xbf;
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gnvs->CMAP = 0x01;
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gnvs->CMBP = 0x01;
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gnvs->LT0 = 0x01;
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gnvs->FDCP = 0x01;
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gnvs->CMCP = 0x01;
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gnvs->CMDP = 0x01;
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gnvs->P2M = 0x02;
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gnvs->IGDS = 0x01;
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gnvs->CADL = 0x09;
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gnvs->PADL = 0x09;
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gnvs->NDID = 3;
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gnvs->DID1 = 0x80000100;
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gnvs->DID2 = 0x80000240;
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gnvs->DID3 = 0x80000410;
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gnvs->DID4 = 0x80000410;
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gnvs->DID5 = 0x00000005;
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gnvs->ALAF = 0x64;
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gnvs->LLOW = 0x2c;
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gnvs->LHIH = 0x01;
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// tolud = pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), 0x5c);
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// oemb->topm = tolud;
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}
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#endif
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#include "southbridge/intel/i82801gx/nvs.h"
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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