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The SB600 also has the BootFailTimer. We should disable it, 

otherwise it will keeps reboot. The comment was also added in
detail to make less confusing when we debug SB600/SB700.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Zheng Bao 2010-03-17 03:10:39 +00:00 committed by Zheng Bao
parent 68f542cdf8
commit d4e77df579
2 changed files with 13 additions and 2 deletions
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10
src/southbridge/amd/sb600/sb600_early_setup.c
View File

@ -71,8 +71,16 @@ static void sb600_lpc_init(void)
u32 reg32;
device_t dev;
/* Enable lpc controller */
dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0); /* SMBUS controller */
/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!!
* This bit has no meaning if debug strap is not enabled. So if the
* board keeps rebooting and the code fails to reach here, we could
* disable the debug strap first. */
reg32 = pci_read_config32(dev, 0x4C);
reg32 |= 1 << 31;
pci_write_config32(dev, 0x4C, reg32);
/* Enable lpc controller */
reg32 = pci_read_config32(dev, 0x64);
reg32 |= 1 << 20;
pci_write_config32(dev, 0x64, reg32);

5
src/southbridge/amd/sb700/sb700_early_setup.c
View File

@ -102,8 +102,11 @@ static void sb700_lpc_init(void)
u32 reg32;
device_t dev;
/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!! */
dev = pci_locate_device(PCI_ID(0x1002, 0x4385), 0); /* SMBUS controller */
/* NOTE: Set BootTimerDisable, otherwise it would keep rebooting!!
* This bit has no meaning if debug strap is not enabled. So if the
* board keeps rebooting and the code fails to reach here, we could
* disable the debug strap first. */
reg32 = pci_read_config32(dev, 0x4C);
reg32 |= 1 << 31;
pci_write_config32(dev, 0x4C, reg32);