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treewide: Drop the suffixes from ADL and RPL CPUID macros and strings 

CPUID is the same for Alder Lake and Raptor Lake S and HX variants.
To reduce the confusion and concerns how to name the macros, remove
the suffixes from macros and platform reporting strings. Thankfully
the stepping names are unique across mobile (P suffixed) and desktop
(S and HX suffixed) SKUs. Distinguishing the S from HX is possible via
host bridge PCI ID.

Change-Id: Ib08fb0923481541dd6f358cf60da44d90bd75ae2
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Michał Żygowski 2023-07-03 17:17:32 +02:00 committed by Felix Held
parent 573e6ded9f
commit d54a5b294f
5 changed files with 32 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/include/cpu/intel/cpu_ids.h
View File

@ -58,11 +58,11 @@
#define CPUID_SAPPHIRERAPIDS_SP_Ex 0x806f8
#define CPUID_ELKHARTLAKE_A0 0x90660
#define CPUID_ELKHARTLAKE_B0 0x90661
#define CPUID_ALDERLAKE_S_A0 0x90670
#define CPUID_ALDERLAKE_S_B0 0x90671
#define CPUID_ALDERLAKE_S_C0 0x90672
#define CPUID_ALDERLAKE_S_G0 0x90674
#define CPUID_ALDERLAKE_S_H0 0x90675
#define CPUID_ALDERLAKE_A0 0x90670
#define CPUID_ALDERLAKE_B0 0x90671
#define CPUID_ALDERLAKE_C0 0x90672
#define CPUID_ALDERLAKE_G0 0x90674
#define CPUID_ALDERLAKE_H0 0x90675
#define CPUID_ALDERLAKE_J0 0x906a0
#define CPUID_ALDERLAKE_Q0 0x906a1
#define CPUID_ALDERLAKE_K0 0x906a2
@ -73,11 +73,11 @@
#define CPUID_METEORLAKE_A0_2 0xa06a1
#define CPUID_METEORLAKE_B0 0xa06a2
#define CPUID_METEORLAKE_C0 0xa06a4
#define CPUID_RAPTORLAKE_S_A0 0xb0670
#define CPUID_RAPTORLAKE_S_B0 0xb0671
#define CPUID_RAPTORLAKE_S_C0 0xb06f2
#define CPUID_RAPTORLAKE_S_H0 0xb06f5
#define CPUID_RAPTORLAKE_P_J0 0xb06a2
#define CPUID_RAPTORLAKE_P_Q0 0xb06a3
#define CPUID_RAPTORLAKE_A0 0xb0670
#define CPUID_RAPTORLAKE_B0 0xb0671
#define CPUID_RAPTORLAKE_C0 0xb06f2
#define CPUID_RAPTORLAKE_H0 0xb06f5
#define CPUID_RAPTORLAKE_J0 0xb06a2
#define CPUID_RAPTORLAKE_Q0 0xb06a3
#endif /* CPU_INTEL_CPU_IDS_H */

2
src/mainboard/intel/adlrvp/mainboard.c
View File

@ -79,7 +79,7 @@ const char *mainboard_vbt_filename(void)
switch (sku_id) {
case ADL_P_LP5_1:
case ADL_P_LP5_2:
if (cpu_id == CPUID_RAPTORLAKE_P_J0)
if (cpu_id == CPUID_RAPTORLAKE_J0)
return "vbt_adlrvp_rpl_lp5.bin";
return "vbt_adlrvp_lp5.bin";
case ADL_M_LP5:

22
src/soc/intel/alderlake/bootblock/report_platform.c
View File

@ -29,17 +29,17 @@ static struct {
{ CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" },
{ CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" },
{ CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" },
{ CPUID_ALDERLAKE_S_A0, "Alderlake-S A0 Platform" },
{ CPUID_ALDERLAKE_S_B0, "Alderlake-S B0 Platform" },
{ CPUID_ALDERLAKE_S_C0, "Alderlake-S C0 Platform" },
{ CPUID_ALDERLAKE_S_G0, "Alderlake-S G0 Platform" },
{ CPUID_ALDERLAKE_S_H0, "Alderlake-S H0 Platform" },
{ CPUID_RAPTORLAKE_S_A0, "Raptorlake-S A0 Platform" },
{ CPUID_RAPTORLAKE_S_B0, "Raptorlake-S B0 Platform" },
{ CPUID_RAPTORLAKE_S_C0, "Raptorlake-S C0 Platform" },
{ CPUID_RAPTORLAKE_S_H0, "Raptorlake-S H0 Platform" },
{ CPUID_RAPTORLAKE_P_J0, "Raptorlake-P J0 Platform" },
{ CPUID_RAPTORLAKE_P_Q0, "Raptorlake-P Q0 Platform" },
{ CPUID_ALDERLAKE_A0, "Alderlake A0 Platform" },
{ CPUID_ALDERLAKE_B0, "Alderlake B0 Platform" },
{ CPUID_ALDERLAKE_C0, "Alderlake C0 Platform" },
{ CPUID_ALDERLAKE_G0, "Alderlake G0 Platform" },
{ CPUID_ALDERLAKE_H0, "Alderlake H0 Platform" },
{ CPUID_RAPTORLAKE_A0, "Raptorlake A0 Platform" },
{ CPUID_RAPTORLAKE_B0, "Raptorlake B0 Platform" },
{ CPUID_RAPTORLAKE_C0, "Raptorlake C0 Platform" },
{ CPUID_RAPTORLAKE_H0, "Raptorlake H0 Platform" },
{ CPUID_RAPTORLAKE_J0, "Raptorlake J0 Platform" },
{ CPUID_RAPTORLAKE_Q0, "Raptorlake Q0 Platform" },
};
static struct {

4
src/soc/intel/alderlake/fsp_params.c
View File

@ -1015,12 +1015,12 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
s_cfg->VrPowerDeliveryDesign = config->vr_power_delivery_design;
/* FIXME: Disable package C state demotion on Raptorlake as a W/A for S0ix issues */
if ((cpu_id == CPUID_RAPTORLAKE_P_J0) || (cpu_id == CPUID_RAPTORLAKE_P_Q0))
if ((cpu_id == CPUID_RAPTORLAKE_J0) || (cpu_id == CPUID_RAPTORLAKE_Q0))
s_cfg->PkgCStateDemotion = 0;
else
s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion;
if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0)
if (cpu_id == CPUID_RAPTORLAKE_J0 || cpu_id == CPUID_RAPTORLAKE_Q0)
s_cfg->C1e = 0;
else
s_cfg->C1e = 1;

14
src/soc/intel/common/block/cpu/mp_init.c
View File

@ -74,19 +74,19 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_L0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_J0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_P_Q0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_B0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_C0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_H0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_J0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_Q0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_B0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_C0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_RAPTORLAKE_H0, CPUID_EXACT_MATCH_MASK },
CPU_TABLE_END
};