util/inteltool: Fix LynxPoint (non-LP) GPIO register map

The GPIO register dumper code for the LynxPoint family PCH chips
(Intel 8 Series and C220 Series) was incorrectly using a
shortened version of the LynxPoint-LP GPIO register map.
Switched to the correct register map for the affected chipsets.

Change-Id: I394a198bbb6628915cb73cabc5c8ff808579a07f
Signed-off-by: Fehér Roland Ádám <feherneoh@gmail.com>
Reviewed-on: https://review.coreboot.org/29167
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Fehér Roland Ádám 2018-10-17 18:41:49 +02:00 committed by Patrick Georgi
parent 967b84d5ea
commit d5a8155f1b
1 changed files with 2 additions and 3 deletions

View File

@ -869,9 +869,8 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
case PCI_DEVICE_ID_INTEL_C226: case PCI_DEVICE_ID_INTEL_C226:
case PCI_DEVICE_ID_INTEL_H81: case PCI_DEVICE_ID_INTEL_H81:
gpiobase = pci_read_word(sb, 0x48) & 0xfffc; gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
gpio_registers = lynxpoint_lp_gpio_registers; gpio_registers = pch_gpio_registers;
/* Shares register locations but has less of them */ size = ARRAY_SIZE(pch_gpio_registers);
size = 29;
break; break;
case PCI_DEVICE_ID_INTEL_3400: case PCI_DEVICE_ID_INTEL_3400:
case PCI_DEVICE_ID_INTEL_3420: case PCI_DEVICE_ID_INTEL_3420: