amd/stoneyridge: Move SB index/data pairs to iomap.h
Relocate the I/O registers to the iomap for PM, PM2, and BIOSRAM. Change-Id: I3a59adc974a8a90bfc586188b829a7252356b3cb Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/22723 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -51,6 +51,12 @@
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#define ACPI_GPE0_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x10) /* 8 bytes */
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#define ACPI_PM_TMR_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x18) /* 4 bytes */
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#define SMB_BASE_ADDR 0xb00
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#define PM2_INDEX 0xcd0
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#define PM2_DATA 0xcd1
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#define BIOSRAM_INDEX 0xcd4
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#define BIOSRAM_DATA 0xcd5
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#define PM_INDEX 0xcd6
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#define PM_DATA 0xcd7
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#define AB_INDX 0xcd8
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#define AB_DATA (AB_INDX+4)
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#define SYS_RESET 0xcf9
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@ -30,14 +30,7 @@
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#define PSP_BAR_ENABLES 0x48
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#define PSP_MAILBOX_BAR_EN 0x10
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/* Power management index/data registers */
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#define BIOSRAM_INDEX 0xcd4
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#define BIOSRAM_DATA 0xcd5
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#define PM_INDEX 0xcd6
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#define PM_DATA 0xcd7
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#define PM2_INDEX 0xcd0
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#define PM2_DATA 0xcd1
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/* Power management registers: 0xfed80300 or index/data at IO 0xcd6/cd7 */
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#define PM_PCI_CTRL 0x08
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#define FORCE_SLPSTATE_RETRY BIT(25)
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#define FORCE_STPCLK_RETRY BIT(24)
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