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mb/google/kahlee: Disable IOMMU 

Unfortunately Stoney has an issue where enabling the IOMMU causes
a 10%-50% decrease in the integrated graphics performance.  It is
also disabled by default on other stoney platforms.

BUG=b:118612241
TEST=Verify that IOMMU is disabled.

Change-Id: Ia396c7227cb21461ec8afbdf746721d4fb28083d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/29342
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth 2018-10-29 13:35:04 -06:00
parent 41baf0c3ff
commit d80884ea5a
5 changed files with 5 additions and 5 deletions
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2
src/mainboard/google/kahlee/variants/aleena/devicetree.cb
View File

@ -58,7 +58,7 @@ chip soc/amd/stoneyridge
end end
device domain 0 on device domain 0 on
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 off end # IOMMU (Disabled for performance and battery)
device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge

2
src/mainboard/google/kahlee/variants/careena/devicetree.cb
View File

@ -61,7 +61,7 @@ chip soc/amd/stoneyridge
end end
device domain 0 on device domain 0 on
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 off end # IOMMU (Disabled for performance and battery)
device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge

2
src/mainboard/google/kahlee/variants/delan/devicetree.cb
View File

@ -55,7 +55,7 @@ chip soc/amd/stoneyridge
end end
device domain 0 on device domain 0 on
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 off end # IOMMU (Disabled for performance and battery)
device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge

2
src/mainboard/google/kahlee/variants/grunt/devicetree.cb
View File

@ -61,7 +61,7 @@ chip soc/amd/stoneyridge
end end
device domain 0 on device domain 0 on
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 off end # IOMMU (Disabled for performance and battery)
device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge

2
src/mainboard/google/kahlee/variants/liara/devicetree.cb
View File

@ -58,7 +58,7 @@ chip soc/amd/stoneyridge
end end
device domain 0 on device domain 0 on
device pci 0.0 on end # Root Complex device pci 0.0 on end # Root Complex
device pci 0.2 on end # IOMMU device pci 0.2 off end # IOMMU
device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4
device pci 1.1 on end # Internal Multimedia device pci 1.1 on end # Internal Multimedia
device pci 2.0 on end # PCIe Host Bridge device pci 2.0 on end # PCIe Host Bridge