soc/mediatek/mt8186: initialize SSPM

SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to
its SRAM space and then enable.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I92eb501a1e48dd02d2f94ff392933261e6a42391
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-11-08 14:28:54 +08:00 committed by Hung-Te Lin
parent 15486f44a2
commit d8e8c873c0
4 changed files with 24 additions and 0 deletions

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@ -16,6 +16,12 @@ config VBOOT
select VBOOT_SEPARATE_VERSTAGE select VBOOT_SEPARATE_VERSTAGE
select VBOOT_RETURN_FROM_VERSTAGE select VBOOT_RETURN_FROM_VERSTAGE
config SSPM_FIRMWARE
string
default "sspm.bin"
help
The file name of the MediaTek SSPM firmware.
config FLASH_DUAL_READ config FLASH_DUAL_READ
bool bool
default y default y

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@ -41,10 +41,12 @@ ramstage-y += emi.c
ramstage-y += ../common/flash_controller.c ramstage-y += ../common/flash_controller.c
ramstage-y += ../common/gpio.c gpio.c ramstage-y += ../common/gpio.c gpio.c
ramstage-y += ../common/i2c.c i2c.c ramstage-y += ../common/i2c.c i2c.c
ramstage-y += ../common/mcu.c
ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
ramstage-y += soc.c ramstage-y += soc.c
ramstage-y += ../common/sspm.c
ramstage-y += ../common/timer.c timer.c ramstage-y += ../common/timer.c timer.c
ramstage-y += ../common/uart.c ramstage-y += ../common/uart.c
ramstage-y += ../common/usb.c usb.c ramstage-y += ../common/usb.c usb.c
@ -54,6 +56,18 @@ ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include
MT8186_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8186
mcu-firmware-files := \
$(CONFIG_SSPM_FIRMWARE)
$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
$(eval $(fw)-file := $(MT8186_BLOB_DIR)/$(fw)) \
$(eval $(fw)-type := raw) \
$(eval $(fw)-compression := LZ4) \
$(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \
)
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@

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@ -45,6 +45,8 @@ enum {
EMI0_BASE = IO_PHYS + 0x00219000, EMI0_BASE = IO_PHYS + 0x00219000,
EMI0_MPU_BASE = IO_PHYS + 0x0021B000, EMI0_MPU_BASE = IO_PHYS + 0x0021B000,
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000,
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
SSPM_CFG_BASE = IO_PHYS + 0x00440000,
SFLASH_REG_BASE = IO_PHYS + 0x01000000, SFLASH_REG_BASE = IO_PHYS + 0x01000000,
AUXADC_BASE = IO_PHYS + 0x01001000, AUXADC_BASE = IO_PHYS + 0x01001000,
UART0_BASE = IO_PHYS + 0x01002000, UART0_BASE = IO_PHYS + 0x01002000,

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@ -3,6 +3,7 @@
#include <device/device.h> #include <device/device.h>
#include <soc/emi.h> #include <soc/emi.h>
#include <soc/mmu_operations.h> #include <soc/mmu_operations.h>
#include <soc/sspm.h>
#include <symbols.h> #include <symbols.h>
static void soc_read_resources(struct device *dev) static void soc_read_resources(struct device *dev)
@ -13,6 +14,7 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev) static void soc_init(struct device *dev)
{ {
mtk_mmu_disable_l2c_sram(); mtk_mmu_disable_l2c_sram();
sspm_init();
} }
static struct device_operations soc_ops = { static struct device_operations soc_ops = {