soc/mediatek/mt8186: initialize SSPM
SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable. TEST=build pass BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I92eb501a1e48dd02d2f94ff392933261e6a42391 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -16,6 +16,12 @@ config VBOOT
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT_RETURN_FROM_VERSTAGE
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select VBOOT_RETURN_FROM_VERSTAGE
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config SSPM_FIRMWARE
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string
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default "sspm.bin"
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help
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The file name of the MediaTek SSPM firmware.
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config FLASH_DUAL_READ
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config FLASH_DUAL_READ
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bool
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bool
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default y
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default y
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@ -41,10 +41,12 @@ ramstage-y += emi.c
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ramstage-y += ../common/flash_controller.c
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ramstage-y += ../common/flash_controller.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-y += ../common/i2c.c i2c.c
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ramstage-y += ../common/i2c.c i2c.c
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ramstage-y += ../common/mcu.c
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ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
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ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
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ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
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ramstage-y += soc.c
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ramstage-y += soc.c
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ramstage-y += ../common/sspm.c
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ramstage-y += ../common/timer.c timer.c
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ramstage-y += ../common/timer.c timer.c
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ramstage-y += ../common/uart.c
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ramstage-y += ../common/uart.c
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ramstage-y += ../common/usb.c usb.c
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ramstage-y += ../common/usb.c usb.c
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@ -54,6 +56,18 @@ ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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CPPFLAGS_common += -Isrc/soc/mediatek/common/include
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MT8186_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8186
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mcu-firmware-files := \
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$(CONFIG_SSPM_FIRMWARE)
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$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
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$(eval $(fw)-file := $(MT8186_BLOB_DIR)/$(fw)) \
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$(eval $(fw)-type := raw) \
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$(eval $(fw)-compression := LZ4) \
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$(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \
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)
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
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./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
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@ -45,6 +45,8 @@ enum {
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EMI0_BASE = IO_PHYS + 0x00219000,
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EMI0_BASE = IO_PHYS + 0x00219000,
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EMI0_MPU_BASE = IO_PHYS + 0x0021B000,
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EMI0_MPU_BASE = IO_PHYS + 0x0021B000,
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DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000,
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DRAMC_CHA_AO_BASE = IO_PHYS + 0x00220000,
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SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
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SSPM_CFG_BASE = IO_PHYS + 0x00440000,
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SFLASH_REG_BASE = IO_PHYS + 0x01000000,
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SFLASH_REG_BASE = IO_PHYS + 0x01000000,
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AUXADC_BASE = IO_PHYS + 0x01001000,
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AUXADC_BASE = IO_PHYS + 0x01001000,
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UART0_BASE = IO_PHYS + 0x01002000,
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UART0_BASE = IO_PHYS + 0x01002000,
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@ -3,6 +3,7 @@
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#include <device/device.h>
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#include <device/device.h>
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#include <soc/emi.h>
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#include <soc/emi.h>
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#include <soc/mmu_operations.h>
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#include <soc/mmu_operations.h>
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#include <soc/sspm.h>
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#include <symbols.h>
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#include <symbols.h>
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static void soc_read_resources(struct device *dev)
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static void soc_read_resources(struct device *dev)
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@ -13,6 +14,7 @@ static void soc_read_resources(struct device *dev)
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static void soc_init(struct device *dev)
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static void soc_init(struct device *dev)
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{
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{
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mtk_mmu_disable_l2c_sram();
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mtk_mmu_disable_l2c_sram();
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sspm_init();
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}
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}
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static struct device_operations soc_ops = {
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static struct device_operations soc_ops = {
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