go with newer auto.c ...
but it fails git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
parent
71e3326b9c
commit
d96e098def
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@ -9,118 +9,70 @@
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#include "pc80/serial.c"
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#include "pc80/serial.c"
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#include "arch/i386/lib/console.c"
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#include "arch/i386/lib/console.c"
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#include "ram/ramtest.c"
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#include "ram/ramtest.c"
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//#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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//#include "superio/NSC/pc97317/pc97317_early_serial.c"
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//#include "northbridge/intel/i440bx/raminit.h"
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#include "cpu/x86/bist.h"
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#include "cpu/x86/bist.h"
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#include "cpu/x86/msr.h"
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#include "cpu/x86/msr.h"
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#include <cpu/amd/gx2def.h>
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#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
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#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
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//#include "debug.c"
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//#include "lib/delay.c"
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#include "southbridge/amd/cs5535/cs5535_early_smbus.c"
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#include "southbridge/amd/cs5535/cs5535_early_setup.c"
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#include "northbridge/amd/gx2/raminit.h"
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#include "northbridge/amd/gx2/raminit.c"
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#include "northbridge/amd/gx2/raminit.c"
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#include "sdram/generic_sdram.c"
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#include "northbridge/amd/gx2/pll_reset.c"
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static void msr_init(void)
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{
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__builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02);
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__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
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__builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
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__builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
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__builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
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__builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
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__builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
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__builtin_wrmsr(0x10000080, 0x3, 0x0);
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__builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
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__builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
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__builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
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__builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
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__builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
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__builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
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__builtin_wrmsr(0x50002001, 0x27, 0x0);
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__builtin_wrmsr(0x4c002001, 0x1, 0x0);
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}
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static void main(unsigned long bist)
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static void main(unsigned long bist)
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{
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{
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// pc97317_enable_serial(SERIAL_DEV, TTYS0_BASE);
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static const struct mem_controller memctrl [] = {
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unsigned char i;
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{.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
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};
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#if 0
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msr_init();
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__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
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__builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
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__builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
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__builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
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__builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
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__builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
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__builtin_wrmsr(0x10000080, 0x3, 0x0);
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__builtin_wrmsr(0x20000020, 0x6, 0x0);
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__builtin_wrmsr(0x20000021, 0x3bd45, 0x3daa8);
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__builtin_wrmsr(0x20000023, 0x3df07, 0x3daa8);
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__builtin_wrmsr(0x20000024, 0x397c3, 0x3daa8);
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__builtin_wrmsr(0x20000029, 0x3b441, 0x3daa8);
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__builtin_wrmsr(0x2000002d, 0x3bea5, 0x3daa8);
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__builtin_wrmsr(0x200000e3, 0x3b441, 0x3daa8);
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__builtin_wrmsr(0x2000, 0x86002, 0x0);
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__builtin_wrmsr(0x4c002001, 0x1, 0x0);
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__builtin_wrmsr(0x50002001, 0x27, 0x0);
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__builtin_wrmsr(0x80002001, 0x86002, 0x0);
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__builtin_wrmsr(0xa0002001, 0x86002, 0x0);
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__builtin_wrmsr(0xc0002001, 0x86002, 0x0);
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#endif
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__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
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__builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
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__builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
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__builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
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__builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
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__builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
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__builtin_wrmsr(0x10000080, 0x3, 0x0);
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__builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
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__builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
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__builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
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__builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
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__builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
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__builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
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__builtin_wrmsr(0x400000e3, 0xf0309c10, 0x0);
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__builtin_wrmsr(0x2000, 0x86002, 0x0);
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__builtin_wrmsr(0xc0002001, 0x86002, 0x0);
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__builtin_wrmsr(0x80002001, 0x86002, 0x0);
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__builtin_wrmsr(0xa0002001, 0x86002, 0x0);
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__builtin_wrmsr(0x50002001, 0x27, 0x0);
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__builtin_wrmsr(0x4c002001, 0x1, 0x0);
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__builtin_wrmsr(0x20000010, 0x3df04, 0x449);
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__builtin_wrmsr(0x20000011, 0x4a14, 0x3bbba);
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__builtin_wrmsr(0x20000012, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000013, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000014, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000015, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000016, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000017, 0xfffff, 0xfffff);
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__builtin_wrmsr(0x20000018, 0x3400, 0x10076013);
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__builtin_wrmsr(0x20000019, 0x696332a3, 0x18000008);
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__builtin_wrmsr(0x2000001a, 0x101, 0x0);
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__builtin_wrmsr(0x2000001b, 0x0, 0x0);
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__builtin_wrmsr(0x2000001c, 0xff00ff, 0x0);
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__builtin_wrmsr(0x2000001d, 0x0, 0x0);
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__builtin_wrmsr(0x2000001e, 0x66, 0x0);
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__builtin_wrmsr(0x2000001f, 0x0, 0x0);
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__builtin_wrmsr(0x20000020, 0x6, 0x0);
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w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
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// while(1)
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outb(0x80, 0x55);
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uart_init();
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uart_init();
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outb(0x80, 0x56);
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console_init();
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console_init();
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outb(0x80, 0x57);
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while (1)
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uart_tx_byte('h');
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/* Halt if there was a built in self test failure */
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report_bist_failure(bist);
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sdram_init();
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cs5535_early_setup();
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pll_reset();
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/* Halt if there was a built in self test failure */
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//report_bist_failure(bist);
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sdram_initialize(1, memctrl);
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/* Check all of memory */
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/* Check all of memory */
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#if 0
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ram_check(0x00000000, 640*1024);
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ram_check(0x00000000, msr.lo);
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#endif
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#if 0
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static const struct {
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unsigned long lo, hi;
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} check_addrs[] = {
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/* Check 16MB of memory @ 0*/
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{ 0x00000000, 0x01000000 },
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#if TOTAL_CPUS > 1
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/* Check 16MB of memory @ 2GB */
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{ 0x80000000, 0x81000000 },
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#endif
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};
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int i;
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for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
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ram_check(check_addrs[i].lo, check_addrs[i].hi);
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}
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#endif
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}
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}
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