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soc/qualcomm/sc7280: Enlarge BOOTBLOCK to 44K 

After CB:78800 applied, the bootblock increases 2128 bytes and exceeded
its allotted size (40K). Therefore, we enlarge BOOTBLOCK to 44K to solve
the compilation error. This patch also increases PRERAM_CBFS_CACHE to
103K to fill the empty space (1K) between TIMESTAMP and TTB.

BRANCH=none
BUG=none
TEST=./util/abuild/abuild -p none -t GOOGLE_HEROBRINE -x -a -B

Change-Id: Iae9d44939b29098e823508dd3965a1bae7a69041
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Yidi Lin 2023-11-03 16:07:53 +08:00 committed by Martin L Roth
parent 2751d2922f
commit da1a0e891b
1 changed files with 6 additions and 6 deletions
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12
src/soc/qualcomm/sc7280/memlayout.ld
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@ -33,12 +33,12 @@ SECTIONS
BSRAM_START(0x14800000)
REGION(pbl_timestamps, 0x14800000, 84K, 4K)
WATCHDOG_TOMBSTONE(0x14818FFC, 4)
BOOTBLOCK(0x14819000, 40K)
PRERAM_CBFS_CACHE(0x14823000, 102K)
TIMESTAMP(0x1483C800, 1K)
TTB(0x1483D000, 56K)
STACK(0x1484B000, 16K)
VBOOT2_WORK(0x1484F000, 12K)
BOOTBLOCK(0x14819000, 44K)
PRERAM_CBFS_CACHE(0x14824000, 103K)
TIMESTAMP(0x1483DC00, 1K)
TTB(0x1483E000, 56K)
STACK(0x1484C000, 16K)
VBOOT2_WORK(0x14850000, 12K)
DMA_COHERENT(0x14853000, 8K)
REGION(qclib_serial_log, 0x14857000, 4K, 4K)
CBFS_MCACHE(0x14858000,16K)