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mb/intel/jasperlake_rvp: Enable S0ix for JSLRVP 

Enable S0ix from devicetree for JSLRVP

TEST= Build, boot JSLRVP and Verified S0ix is
working by running "echo freeze > /sys/power/state"
from kernel console.

Change-Id: Iedbd7ce9db546f8dc6cb3343fa624abde0ef0d3f
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
This commit is contained in:
Ronak Kanabar 2020-04-06 16:37:01 +05:30 committed by Subrata Banik
parent d7564dc1b9
commit da968d5f2e
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
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@ -124,7 +124,7 @@ chip soc/intel/jasperlake
register "dptf_enable" = "1" register "dptf_enable" = "1"
# Enable S0ix # Enable S0ix
register "s0ix_enable" = "0" register "s0ix_enable" = "1"
register "common_soc_config" = "{ register "common_soc_config" = "{
.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,