mb/intel/jasperlake_rvp: Enable audio

Enable audio for Jasper Lake RVP board. It has 2 Audio codec chips
connected on I2C0: DA7219 and MAX98373

1. Enable Kconfig to enable I2C drivers for both chips.
2. Make necessary devicetree changes to enable FSP UPDs and ACPI entry
   for I2C0.
3. Enable audio related GPIO configurations.

BUG=None
BRANCH=None
TEST=Checked that dmic and speaker are functional on Jasper Lake RVP

Change-Id: Ibf76eb36c478bd33cbc0c86099236452b397fcc5
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39695
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maulik V Vaghela 2020-03-20 15:44:46 +05:30 committed by Subrata Banik
parent 9225fd5040
commit d7564dc1b9
3 changed files with 101 additions and 10 deletions

View File

@ -3,8 +3,10 @@ if BOARD_INTEL_JASPERLAKE_RVP || BOARD_INTEL_JASPERLAKE_RVP_EXT_EC
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select DRIVERS_I2C_DA7219
select DRIVERS_I2C_HID
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_MAX98373
select DRIVERS_USB_ACPI
select EC_ACPI
select GENERIC_SPD_BIN

View File

@ -58,7 +58,11 @@ chip soc/intel/jasperlake
register "gen3_dec" = "0x00fc0901"
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHdaEnable" = "1"
register "PchHdaAudioLinkHdaEnable" = "0"
register "PchHdaAudioLinkSspEnable[0]" = "1"
register "PchHdaAudioLinkSspEnable[1]" = "1"
register "PchHdaAudioLinkDmicEnable[0]" = "1"
register "PchHdaAudioLinkDmicEnable[1]" = "1"
# PCIe port 1 for M.2 E-key WLAN
register "PcieRpEnable[1]" = "1"
@ -128,6 +132,15 @@ chip soc/intel/jasperlake
.speed_mhz = 1,
.early_init = 1,
},
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 176,
.scl_hcnt = 95,
.sda_hold = 36,
}
},
}"
device domain 0 on
@ -233,14 +246,40 @@ chip soc/intel/jasperlake
end
device pci 14.5 on end # SDCard
device pci 15.0 on
chip drivers/i2c/hid
register "generic.hid" = ""ALPS0000""
register "generic.desc" = ""Touchpad""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
end # I2C 0
chip drivers/i2c/max98373
register "vmon_slot_no" = "4"
register "imon_slot_no" = "5"
register "uid" = "0"
register "desc" = ""RIGHT SPEAKER AMP""
register "name" = ""MAXR""
device i2c 31 on end
end
chip drivers/i2c/max98373
register "vmon_slot_no" = "6"
register "imon_slot_no" = "7"
register "uid" = "1"
register "desc" = ""LEFT SPEAKER AMP""
register "name" = ""MAXL""
device i2c 32 on end
end
chip drivers/i2c/da7219
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
register "btn_cfg" = "50"
register "mic_det_thr" = "500"
register "jack_ins_deb" = "20"
register "jack_det_rate" = ""32ms_64ms""
register "jack_rem_deb" = "1"
register "a_d_btn_thr" = "0xa"
register "d_b_btn_thr" = "0x16"
register "b_c_btn_thr" = "0x21"
register "c_mic_btn_thr" = "0x3e"
register "btn_avg" = "4"
register "adc_1bit_rpt" = "1"
register "micbias_lvl" = "2600"
register "mic_amp_in_sel" = ""diff""
device i2c 1a on end
end
end # I2C 0 Audio
device pci 15.1 on end # I2C #1
device pci 15.2 on end # I2C #2
device pci 15.3 on end # I2C #3

View File

@ -7,7 +7,57 @@
/* Pad configuration in ramstage*/
static const struct pad_config gpio_table[] = {
/* ToDo: Fill gpio configuration */
/* ToDo: Fill other gpio configuration */
/* Audio related GPIOs */
/* I2C0_SDA */
PAD_CFG_NF(GPP_C16, UP_2K, DEEP, NF1),
/* I2C0_SCL */
PAD_CFG_NF(GPP_C17, UP_2K, DEEP, NF1),
/* I2S_MCLK */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
/* I2S1_SCLK */
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
/* Audio Jack Detection */
PAD_CFG_GPI_INT(GPP_H16, NONE, PLTRST, EDGE_BOTH),
/* I2S0_SCLK */
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2),
/* I2S0_SFRM */
PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2),
/* I2S0_TXD */
PAD_CFG_NF(GPP_R2, NONE, DEEP, NF2),
/* I2S0_RXD */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
/* I2S1_RXD */
PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2),
/* I2S1_SFRM */
PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2),
/* I2S1_TXD */
PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2),
/* DMIC_CLK_1 */
PAD_CFG_NF(GPP_S2, UP_20K, DEEP, NF2),
/* DMIC_DATA_1 */
PAD_CFG_NF(GPP_S3, UP_20K, DEEP, NF2),
/* DMIC_CLK_0 */
PAD_CFG_NF(GPP_S6, UP_20K, DEEP, NF2),
/* DMIC_DATA_0 */
PAD_CFG_NF(GPP_S7, UP_20K, DEEP, NF2),
};
/* Early pad configuration in bootblock */