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Maulik V Vaghela d7564dc1b9 mb/intel/jasperlake_rvp: Enable audio
Enable audio for Jasper Lake RVP board. It has 2 Audio codec chips
connected on I2C0: DA7219 and MAX98373

1. Enable Kconfig to enable I2C drivers for both chips.
2. Make necessary devicetree changes to enable FSP UPDs and ACPI entry
   for I2C0.
3. Enable audio related GPIO configurations.

BUG=None
BRANCH=None
TEST=Checked that dmic and speaker are functional on Jasper Lake RVP

Change-Id: Ibf76eb36c478bd33cbc0c86099236452b397fcc5
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39695
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-13 06:44:51 +00:00
3rdparty 3rdparty/libgfxinit: Update submodule pointer 2020-03-09 08:20:12 +00:00
Documentation Doc/mb/lenovo/ivb_internal_flashing: Fix a typo 2020-04-09 23:44:21 +00:00
LICENSES LICENSES: Add licenses used in the coreboot repo 2019-10-30 08:23:51 +00:00
configs fsp2_0: Clean up around `config FSP_USE_REPO` 2020-04-05 23:26:04 +00:00
payloads payloads/nvramcui: Select USE_OPTION_TABLE 2020-04-09 15:27:30 +00:00
src mb/intel/jasperlake_rvp: Enable audio 2020-04-13 06:44:51 +00:00
util util/nvramtool: Remove 2nd initialization 2020-04-10 11:56:13 +00:00
.checkpatch.conf
.clang-format
.editorconfig
.gitignore cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
.gitmodules submodules: Add 3rdparty/amd_blobs 2019-10-31 12:28:38 +00:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
AUTHORS AUTHORS: Add authors from util/ 2020-03-18 18:22:37 +00:00
COPYING
MAINTAINERS Remove myself from MAINTAINERS file 2020-04-01 09:03:18 +00:00
Makefile cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
Makefile.inc Makefile.inc: Don't run `ifittool` with CONFIG_UPDATE_IMAGE 2020-03-25 10:51:50 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc
toolchain.inc Makefile: Remove romcc 2019-12-27 08:59:59 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.