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mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz 

Update board type to 4 as per MRC team's input. This
fixes LP5 sagv point 3 being clipped from the expected
5200Mhz to 4800Mhz.

TEST=Boot to OS, verify frequency locked.

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I9472aec41537425c1ed648b949f484939ee9ff99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Bora Guvendik 2021-10-15 13:37:47 -07:00 committed by Felix Held
parent 86a9cdd589
commit db85b096d4
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/intel/adlrvp/memory.c
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@ -227,7 +227,7 @@ static const struct mb_cfg adlm_lp4_mem_config = {
.LpDdrDqDqsReTraining = 1,
.UserBd = BOARD_TYPE_ULT_ULX,
.UserBd = BOARD_TYPE_ULT_ULX_T4,
};
static const struct mb_cfg adlm_lp5_mem_config = {
@ -283,7 +283,7 @@ static const struct mb_cfg adlm_lp5_mem_config = {
.ect = false, /* Early Command Training */
.UserBd = BOARD_TYPE_ULT_ULX,
.UserBd = BOARD_TYPE_ULT_ULX_T4,
.lp5x_config = {
.ccc_config = 0xff,