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soc/intel/denverton_ns: Resolve macro conflicts with UDK2017 headers 

Replace LShiftU64 and RShiftU64 as the defined macro conflicts with
UDK2017 headers.

Tested using timeless builds: The produced binaries are identical.

Change-Id: I8f205f663be9c9c31cf384ca89370afa48ca1e15
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62985
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph 2022-03-22 09:02:16 +01:00 committed by Felix Held
parent 79b35ca481
commit dcf30e837b
2 changed files with 13 additions and 24 deletions
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34
src/soc/intel/denverton_ns/gpio_dnv.c
View File

@ -425,24 +425,19 @@ void gpio_configure_dnv_pads(const struct dnv_pad_config *gpio, size_t num)
//
// Update value to be programmed in HOSTSW_OWN register
//
HostSoftOwnRegMask[GroupIndex] |= LShiftU64(
(uint64_t)GpioData->GpioConfig.HostSoftPadOwn & 0x1,
PadNumber);
HostSoftOwnReg[GroupIndex] |= LShiftU64(
(uint64_t)GpioData->GpioConfig.HostSoftPadOwn >> 0x1,
PadNumber);
HostSoftOwnRegMask[GroupIndex] |=
((uint64_t)GpioData->GpioConfig.HostSoftPadOwn & 0x1) << PadNumber;
HostSoftOwnReg[GroupIndex] |=
((uint64_t)GpioData->GpioConfig.HostSoftPadOwn >> 0x1) << PadNumber;
//
// Update value to be programmed in GPI_GPE_EN register
//
GpiGpeEnRegMask[GroupIndex] |= LShiftU64(
(uint64_t)(GpioData->GpioConfig.InterruptConfig & 0x1),
PadNumber);
GpiGpeEnReg[GroupIndex] |= LShiftU64(
(uint64_t)(GpioData->GpioConfig.InterruptConfig &
GpioIntSci) >>
3,
PadNumber);
GpiGpeEnRegMask[GroupIndex] |=
((uint64_t)GpioData->GpioConfig.InterruptConfig & 0x1) << PadNumber;
GpiGpeEnReg[GroupIndex] |=
(((uint64_t)GpioData->GpioConfig.InterruptConfig & GpioIntSci) >> 3)
<< PadNumber;
}
for (Index = 0; Index < NumberOfGroups; Index++) {
@ -463,10 +458,8 @@ void gpio_configure_dnv_pads(const struct dnv_pad_config *gpio, size_t num)
GpioGroupInfo[Index].Community,
GpioGroupInfo[Index].HostOwnOffset +
0x4),
~(uint32_t)(RShiftU64(HostSoftOwnRegMask[Index],
32)),
(uint32_t)(
RShiftU64(HostSoftOwnReg[Index], 32)));
~(uint32_t)(HostSoftOwnRegMask[Index] >> 32),
(uint32_t)(HostSoftOwnReg[Index] >> 32));
}
//
@ -486,9 +479,8 @@ void gpio_configure_dnv_pads(const struct dnv_pad_config *gpio, size_t num)
GpioGroupInfo[Index].Community,
GpioGroupInfo[Index].GpiGpeEnOffset +
0x4),
~(uint32_t)(
RShiftU64(GpiGpeEnRegMask[Index], 32)),
(uint32_t)(RShiftU64(GpiGpeEnReg[Index], 32)));
~(uint32_t)(GpiGpeEnRegMask[Index] >> 32),
(uint32_t)(GpiGpeEnReg[Index] >> 32));
}
}
}

3
src/soc/intel/denverton_ns/include/soc/gpio_dnv.h
View File

@ -3,9 +3,6 @@
#ifndef _DENVERTON_NS_GPIO_H_
#define _DENVERTON_NS_GPIO_H_
#define RShiftU64(Operand, Count) (Operand >> Count)
#define LShiftU64(Operand, Count) (Operand << Count)
#include <soc/gpio_defs.h>
#ifndef __ACPI__