igd.asl rewrite

Old igd.asl had inconsistent addresses (between _DOD and actual device)
and ghost devices. Any of those is enough to make brightness on windows
fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous
copying of the same thing 6 times per chipset. Leave only hooking up and
chipset-specific part in chipset directory. Move NVS handling and ACPI-spec
parts to a common file.

Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7472
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>

src/drivers/intel/gma/Kconfig

@@ -36,3 +36,7 @@ config INTEL_EDID
 config INTEL_INT15
 	bool
 	default n
+
+config INTEL_GMA_ACPI
+	bool
+	default n

src/drivers/intel/gma/Makefile.inc

@@ -23,3 +23,4 @@ ramstage-$(CONFIG_INTEL_EDID) += edid.c vbt.c
 ifeq ($(CONFIG_VGA_ROM_RUN),y)
 ramstage-$(CONFIG_INTEL_INT15) += int15.c
 endif
+ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c

src/drivers/intel/gma/acpi.c

@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2014 Vladimir Serbinenko
+ * Subject to the GNU GPL v2, or (at your option) any later version.
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#include <string.h>
+#include "i915.h"
+
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf)
+{
+	size_t i;
+	const char *names[] = { "UNK", "VGA", "TV", "DVI", "LCD" };
+	int counters[ARRAY_SIZE(names)];
+
+	memset(counters, 0, sizeof(counters));
+
+	acpigen_write_scope("\\_SB.PCI0.GFX0");
+
+	/*
+	Method (_DOD, 0)
+	{
+		Return (Package() {
+				0x5a5a5a5a,
+				0x5a5a5a5a,
+				0x5a5a5a5a
+			})
+	}
+	*/
+	acpigen_write_method("_DOD", 0);
+	acpigen_emit_byte(0xa4); /* ReturnOp.  */
+	acpigen_write_package(conf->ndid);
+
+	for (i = 0; i < conf->ndid; i++) {
+		acpigen_write_dword (conf->did[i] | 0x80010000);
+	}
+	acpigen_pop_len(); /* End Package. */
+	acpigen_pop_len(); /* End Method. */
+
+	for (i = 0; i < conf->ndid; i++) {
+		char name[10];
+		char *ptr;
+		int kind;
+		kind = (conf->did[i] >> 8) & 0xf;
+		if (kind >= ARRAY_SIZE(names)) {
+			kind = 0;
+		}
+		strcpy(name, names[kind]);
+		for (ptr = name; *ptr; ptr++);
+		*ptr++ = counters[kind] + '0';
+		*ptr++ = '\0';
+		counters[kind]++;
+		acpigen_write_device(name);
+		/* Name (_ADR, 0x0410) */
+		acpigen_write_name_dword("_ADR", conf->did[i] & 0xffff);
+
+		/* ACPI brightness for LCD.  */
+		if (kind == 4) {
+			/*
+			  Method (_BCL, 0, NotSerialized)
+			  {
+			  	Return (^^XBCL())
+			  }
+			*/
+			acpigen_write_method("_BCL", 0);
+			acpigen_emit_byte(0xa4); /* ReturnOp.  */
+			acpigen_emit_namestring("^^XBCL");
+			acpigen_pop_len();
+
+			/*
+			  Method (_BCM, 1, NotSerialized)
+			  {
+			  	^^XBCM(Arg0)
+			  }
+			*/
+			acpigen_write_method("_BCM", 1);
+			acpigen_emit_namestring("^^XBCM");
+			acpigen_emit_byte(0x68); /* Arg0Op.  */
+			acpigen_pop_len();
+
+			/*
+			  Method (_BQC, 0, NotSerialized)
+			  {
+			  	Return (^^XBQC())
+			  }
+			*/
+			acpigen_write_method("_BQC", 0);
+			acpigen_emit_byte(0xa4); /* ReturnOp.  */
+			acpigen_emit_namestring("^^XBQC");
+			acpigen_pop_len();
+		}
+
+		/*
+		Method(_DCS, 0)
+		{
+			Return (^^XDCS(<device number>))
+		}
+		*/
+		acpigen_write_method("_DCS", 0);
+		acpigen_emit_byte(0xa4); /* ReturnOp.  */
+		acpigen_emit_namestring("^^XDCS");
+		acpigen_write_byte(i);
+		acpigen_pop_len();
+
+		/*
+		Method(_DGS, 0)
+		{
+			Return (^^XDGS(<device number>))
+		}
+		*/
+		acpigen_write_method("_DGS", 0);
+		acpigen_emit_byte(0xa4); /* ReturnOp.  */
+		acpigen_emit_namestring("^^XDGS");
+		acpigen_write_byte(i);
+		acpigen_pop_len();
+
+		/*
+		Method(_DSS, 1)
+		{
+			^^XDSS(0x5a, Arg0)
+		}
+		*/
+		acpigen_write_method("_DSS", 0);
+		acpigen_emit_namestring("^^XDSS");
+		acpigen_write_byte(i);
+		acpigen_emit_byte(0x68); /* Arg0Op.  */
+		acpigen_pop_len();
+
+		acpigen_pop_len();
+	}
+
+	acpigen_pop_len();
+}

src/drivers/intel/gma/i915.h

@@ -292,8 +292,15 @@ struct i915_gpu_controller_info
 	int link_frequency_270_mhz;
 	int lvds_num_lanes;
 	u32 backlight;
+	int ndid;
+	u32 did[5];
 };
 
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf);
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void);
+
 int i915lightup(unsigned int physbase, unsigned int mmio,
 		unsigned int gfx, unsigned int init_fb);
 int panel_lightup(struct intel_dp *dp, unsigned int init_fb);

src/drivers/intel/gma/igd.asl

@@ -0,0 +1,113 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+	External(LCD0, DeviceObj)
+
+	Name (BRCT, 0)
+
+	Method(BRID, 1, NotSerialized)
+	{
+		Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
+		If (LEqual (Local0, Ones))
+		{
+			Return (Subtract(SizeOf(BRIG), One))
+		}
+		Return (Local0)
+	}
+
+	Method (XBCL, 0, NotSerialized)
+	{
+		Store (1, BRCT)
+		Return (BRIG)
+	}
+
+	/* Display Output Switching */
+	Method (_DOS, 1)
+	{
+		/* Windows 2000 and Windows XP call _DOS to enable/disable
+		 * Display Output Switching during init and while a switch
+		 * is already active
+		 */
+		Store (And(Arg0, 7), DSEN)
+	}
+
+	/* Using Notify is the right way. But Windows doesn't handle
+	   it well. So use both method in a way to avoid double action.
+	 */
+	Method (DECB, 0, NotSerialized)
+	{
+		If (BRCT)
+		{
+			Notify (LCD0, 0x87)
+		} Else {
+			Store (BRID (XBQC ()), Local0)
+			If (LNotEqual (Local0, 2))
+			{
+				Decrement (Local0)
+			}
+			XBCM (DerefOf (Index (BRIG, Local0)))
+		}
+	}
+
+	Method (INCB, 0, NotSerialized)
+	{
+		If (BRCT)
+		{
+			Notify (LCD0, 0x86)
+		} Else {
+			Store (BRID (XBQC ()), Local0)
+			If (LNotEqual (Local0, Subtract(SizeOf(BRIG), One)))
+			{
+				Increment (Local0)
+			}
+			XBCM (DerefOf (Index (BRIG, Local0)))
+		}
+	}
+
+	/* Device Current Status */
+	Method(XDCS, 1)
+	{
+		TRAP(1)
+		If (And(CSTE, ShiftLeft (1, Arg0))) {
+			Return (0x1f)
+		}
+		Return(0x1d)
+	}
+
+	/* Query Device Graphics State */
+	Method(XDGS, 1)
+	{
+		If (And(NSTE, ShiftLeft (1, Arg0))) {
+			Return(1)
+		}
+		Return(0)
+	}
+
+	/* Device Set State */
+	Method(XDSS, 2)
+	{
+		/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
+		 * display switch was completed
+		 */
+		If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
+			Store (NSTE, CSTE)
+		}
+	}

src/mainboard/apple/macbook21/acpi/video.asl

@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-Device (DSPC)
-{
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
-	Method(BRTD, 0, NotSerialized)
-	{
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
-	}
-
-	Method(BRTU, 0, NotSerialized)
-	{
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
-	}
-}

src/mainboard/apple/macbook21/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/apple/macbook21/cmos.default

@@ -9,7 +9,6 @@ boot_default=0x40
 cmos_defaults_loaded=Yes
 lpt=Enable
 volume=0x3
-tft_brightness=0xff
 first_battery=Primary
 bluetooth=Enable
 wlan=Enable

src/mainboard/apple/macbook21/cmos.layout

@@ -85,7 +85,6 @@ entries
 1052         4       r       0        C1DRT1
 
 1064         8       h       0        volume
-1072         8       h       0        tft_brightness
 1080         1       e       9        first_battery
 1081         1       e       1        bluetooth
 1082         1       e       1        wwan

src/mainboard/apple/macbook21/devicetree.cb

@@ -20,11 +20,14 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_hotplug" = "0x00000220"
 	register "gpu_lvds_use_spread_spectrum_clock" = "1"
 	register "gpu_lvds_is_dual_channel" = "0"
-	register "gpu_backlight" = "0x1280128"
+	register "gpu_backlight" = "0x1290128"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478

src/mainboard/emulation/qemu-q35/mainboard.c

@@ -25,6 +25,7 @@
 #include <pc80/keyboard.h>
 #include <arch/io.h>
 #include <console/console.h>
+#include <drivers/intel/gma/i915.h>
 
 #define Q35_PAM0            0x90
 
@@ -33,6 +34,19 @@ static const unsigned char qemu_q35_irqs[] = {
 	10, 10, 11, 11,
 };
 
+struct i915_gpu_controller_info gfx_controller_info = {
+	.ndid = 3,
+	.did = {
+		0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005
+	}
+};
+
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{	
+	return &gfx_controller_info;
+}
+
 static void qemu_nb_init(device_t dev)
 {
 	/* Map memory at 0xc0000 - 0xfffff */

src/mainboard/getac/p470/acpi/ec.asl

@@ -192,7 +192,7 @@ Device(EC0)
 	{
 		Store(0x3f, HOTK)
 		If(IGDS) {
-			HKDS(10)
+			Notify (\_SB.PCI0.GFX0, 0x82)
 		} Else {
 			TRAP(0xE1)
 		}

src/mainboard/getac/p470/acpi/video.asl

@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}

src/mainboard/getac/p470/acpi_tables.c

@@ -37,14 +37,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* Enable COM port(s) */
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x00;
-
-	/* IGD Displays  */
-	gnvs->ndid = 2;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000410;
-	gnvs->did[2] = 0x80000320;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 static long acpi_create_ecdt(acpi_ecdt_t * ecdt)

src/mainboard/getac/p470/devicetree.cb

@@ -19,6 +19,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "2"
+	register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478

src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c

@@ -56,14 +56,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 

src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb

@@ -1,4 +1,8 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_LGA1155
 			device lapic 0 on end

src/mainboard/gigabyte/ga-b75m-d3v/acpi/mainboard.asl

@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-Method (BRTN, 1, Serialized)
-{
-	If (LEqual (And (DID1, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD01, Arg0)
-	}
-
-	If (LEqual (And (DID2, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD02, Arg0)
-	}
-
-	If (LEqual (And (DID3, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD03, Arg0)
-	}
-
-	If (LEqual (And (DID4, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD04, Arg0)
-	}
-
-	If (LEqual (And (DID5, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD05, Arg0)
-	}
-}

src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c

@@ -56,14 +56,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 

src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_LGA1155
 			device lapic 0 on end

src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl

@@ -11,7 +11,6 @@ DefinitionBlock(
 
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include "acpi/mainboard.asl"
 	#include <cpu/intel/model_206ax/acpi/cpu.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>

src/mainboard/google/bolt/acpi_tables.c

@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?

src/mainboard/google/bolt/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/butterfly/acpi_tables.c

@@ -54,13 +54,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// TODO: MLR
 	// The firmware read/write status is a "virtual" switch and

src/mainboard/google/butterfly/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/falco/acpi_tables.c

@@ -60,13 +60,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?

src/mainboard/google/falco/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/link/acpi_tables.c

@@ -64,14 +64,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 1;
-	gnvs->did[0] = 0x80000000;
-	gnvs->did[1] = 0x80000000;
-	gnvs->did[2] = 0x00000000;
-	gnvs->did[3] = 0x00000000;
-	gnvs->did[4] = 0x00000000;
-
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
 		ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;

src/mainboard/google/link/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "1"
+	register "gfx.did" = "{ 0x80000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/panther/acpi_tables.c

@@ -77,13 +77,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	// SuperIO is always RO

src/mainboard/google/panther/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Disable eDP Hotplug
 	register "gpu_dp_d_hotplug" = "0x00"

src/mainboard/google/parrot/acpi_tables.c

@@ -55,13 +55,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = parrot_ec_running_ro() ?

src/mainboard/google/parrot/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort B Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"

src/mainboard/google/peppy/acpi_tables.c

@@ -69,13 +69,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?

src/mainboard/google/peppy/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/slippy/acpi_tables.c

@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?

src/mainboard/google/slippy/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/google/stout/acpi_tables.c

@@ -58,13 +58,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = get_recovery_mode_switch() ?

src/mainboard/google/stout/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/ibase/mb899/acpi/video.asl

@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}

src/mainboard/ibase/mb899/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/ibase/mb899/devicetree.cb

@@ -1,4 +1,8 @@
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478
 			device lapic 0 on end

src/mainboard/intel/baskingridge/acpi_tables.c

@@ -79,13 +79,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	/* Emerald Lake has no EC (?) */

src/mainboard/intel/baskingridge/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/intel/cougar_canyon2/acpi_tables.c

@@ -62,16 +62,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 1;
 	gnvs->s5u1 = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	acpi_update_thermal_table(gnvs);
-
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/intel/cougar_canyon2/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/fsp_sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/intel/d945gclf/acpi/video.asl

@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}

src/mainboard/intel/emeraldlake2/acpi_tables.c

@@ -78,13 +78,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 1;
 	gnvs->s5u1 = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	acpi_update_thermal_table(gnvs);
 

src/mainboard/intel/emeraldlake2/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/iwave/iWRainbowG6/acpi/video.asl

@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}

src/mainboard/iwave/iWRainbowG6/acpi_tables.c

@@ -40,14 +40,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
 	/* Enable both COM ports. */
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
-
-	/* IGD Displays. */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/iwave/iWRainbowG6/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sch
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_441

src/mainboard/kontron/986lcd-m/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/kontron/986lcd-m/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478

src/mainboard/kontron/ktqm77/acpi_tables.c

@@ -52,14 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 0;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	acpi_update_thermal_table(gnvs);
 }
 

src/mainboard/kontron/ktqm77/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989

src/mainboard/lenovo/t420s/acpi_tables.c

@@ -51,14 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 

src/mainboard/lenovo/t420s/devicetree.cb

@@ -1,4 +1,6 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/t420s/dsdt.asl

@@ -20,8 +20,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
 #define HAVE_LCD_SCREEN 1

src/mainboard/lenovo/t430s/acpi_tables.c

@@ -37,14 +37,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 

src/mainboard/lenovo/t430s/devicetree.cb

@@ -1,4 +1,6 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/t430s/dsdt.asl

@@ -20,8 +20,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
 #define HAVE_LCD_SCREEN 1

src/mainboard/lenovo/t520/acpi_tables.c

@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;

src/mainboard/lenovo/t520/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/t520/dsdt.asl

@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",

src/mainboard/lenovo/t530/acpi_tables.c

@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;

src/mainboard/lenovo/t530/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/t530/dsdt.asl

@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",

src/mainboard/lenovo/t60/acpi/video.asl

@@ -20,35 +20,17 @@
 
 #include "smi.h"
 
-Device (DSPC)
+Scope (\)
 {
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
 	Method(BRTD, 0, NotSerialized)
 	{
 		Trap(SMI_BRIGHTNESS_DOWN)
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
+		\_SB.PCI0.GFX0.DECB()
 	}
 
 	Method(BRTU, 0, NotSerialized)
 	{
 		Trap(SMI_BRIGHTNESS_UP)
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
+		\_SB.PCI0.GFX0.INCB()
 	}
 }

src/mainboard/lenovo/t60/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/lenovo/t60/devicetree.cb

@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478

src/mainboard/lenovo/t60/dsdt.asl

@@ -19,8 +19,8 @@
  */
 
 #define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \BRTU
+#define BRIGHTNESS_DOWN \BRTD
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 
 DefinitionBlock(
@@ -45,6 +45,12 @@ DefinitionBlock(
 	// mainboard specific devices
 	#include "acpi/mainboard.asl"
 
+	Scope (\)
+	{
+		// backlight control, display switching, lid
+		#include "acpi/video.asl"
+	}
+
 	#include <cpu/intel/model_6dx/acpi/cpu.asl>
 
 	Scope (\_SB) {

src/mainboard/lenovo/x200/acpi_tables.c

@@ -40,13 +40,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 0; /* Will use default of 0x00000400. */
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/lenovo/x200/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/gm45
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gfx.use_spread_spectrum_clock" = "1"
 	register "gfx.lvds_dual_channel" = "0"

src/mainboard/lenovo/x200/dsdt.asl

@@ -19,8 +19,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define DISPLAY_DEVICE_2_IS_LCD_SCREEN 1
 

src/mainboard/lenovo/x201/acpi_tables.c

@@ -33,11 +33,4 @@
 
 void acpi_create_gnvs(global_nvs_t * gnvs)
 {
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }

src/mainboard/lenovo/x201/devicetree.cb

@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/nehalem
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 
 	# Enable DisplayPort Hotplug with 6ms pulse

src/mainboard/lenovo/x201/dsdt.asl

@@ -19,11 +19,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",

src/mainboard/lenovo/x220/acpi_tables.c

@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u1 = 0;
 
 	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;

src/mainboard/lenovo/x220/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/x220/dsdt.asl

@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",

src/mainboard/lenovo/x230/acpi_tables.c

@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u1 = 0;
 
 	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;

src/mainboard/lenovo/x230/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"

src/mainboard/lenovo/x230/dsdt.asl

@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",

src/mainboard/lenovo/x60/acpi/video.asl

@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include "smi.h"
-
-Device (DSPC)
-{
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
-	Method(BRTD, 0, NotSerialized)
-	{
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-			Trap(SMI_SAVE_CMOS)
-		}
-	}
-
-	Method(BRTU, 0, NotSerialized)
-	{
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-			Trap(SMI_SAVE_CMOS)
-		}
-	}
-}

src/mainboard/lenovo/x60/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/lenovo/x60/devicetree.cb

@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_hotplug" = "0x00000220"
 	register "gpu_lvds_use_spread_spectrum_clock" = "1"

src/mainboard/lenovo/x60/dsdt.asl

@@ -18,9 +18,11 @@
  * Foundation, Inc.
  */
 
+#include "smi.h"
+
 #define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 
 DefinitionBlock(

src/mainboard/packardbell/ms2290/acpi/ec.asl

@@ -121,12 +121,12 @@ Device(EC)
 	/* Decrease brightness.  */
 	Method(_Q1D, 0, NotSerialized)
 	{
-		\_SB.PCI0.GFX0.LCD0.DECB()
+		\_SB.PCI0.GFX0.DECB()
 	}
 	/* Increase brightness.  */
 	Method(_Q1C, 0, NotSerialized)
 	{
-		\_SB.PCI0.GFX0.LCD0.INCB()
+		\_SB.PCI0.GFX0.INCB()
 	}
 
 #include "battery.asl"

src/mainboard/packardbell/ms2290/acpi_tables.c

@@ -33,12 +33,5 @@
 
 void acpi_create_gnvs(global_nvs_t * gnvs)
 {
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 

src/mainboard/packardbell/ms2290/devicetree.cb

@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/nehalem
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_dp_b_hotplug" = "0x04"
 	register "gpu_dp_c_hotplug" = "0x04"

src/mainboard/packardbell/ms2290/dsdt.asl

@@ -18,8 +18,6 @@
  * Foundation, Inc.
  */
 
-#define HAVE_LCD_SCREEN 1
-
 DefinitionBlock(
 	"dsdt.aml",
 	"DSDT",

src/mainboard/roda/rk886ex/acpi/ec.asl

@@ -97,8 +97,8 @@ Device(EC0)
 	Method (_Q12, 0)
 	{
 		Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
+		Notify (\_SB.PCI0.GFX0, 0x82)
 		// Store(1, TLST)
-		// HKDS(10)
 	}
 
 	Method (_Q30, 0)

src/mainboard/roda/rk886ex/acpi/video.asl

@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}

src/mainboard/roda/rk886ex/acpi_tables.c

@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/roda/rk886ex/devicetree.cb

@@ -19,6 +19,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478

src/mainboard/roda/rk9/acpi_tables.c

@@ -40,13 +40,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 0; /* Will use default of 0x00000400. */
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)

src/mainboard/roda/rk9/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/gm45
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_BGA956
 			device lapic 0 on end

src/mainboard/samsung/lumpy/acpi_tables.c

@@ -80,13 +80,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	acpi_update_thermal_table(gnvs);
 

src/mainboard/samsung/lumpy/devicetree.cb

@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"