mb/(amd,google): Update SPI Kconfig settings based on devicetree
This takes the devicetree SPI settings and moves them into Kconfig. BUG=b:195943311 TEST=boot guybrush & majolica and verify spi settings. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Icce1d57761465ae8255e5d9ce8679f3fdcb0ceed Reviewed-on: https://review.coreboot.org/c/coreboot/+/56885 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@ -92,20 +92,27 @@ config VGA_BIOS_DGPU_FILE
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string
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default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin"
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if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
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config EFS_SPI_READ_MODE
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int
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default 0 if EM100
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default 3
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default 3 # Quad IO (1-1-4)
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config EFS_SPI_SPEED
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int
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default 3 if EM100
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default 0
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default 0 # 66MHz
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config EFS_SPI_MICRON_FLAG
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int
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default 0
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config NORMAL_READ_SPI_SPEED
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default 1 # 33MHz
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config ALT_SPI_SPEED
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default 1 # 33MHz
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config TPM_SPI_SPEED
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default 1 # 33MHz
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endif # !EM100
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choice
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prompt "DDI-0 connector type"
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default CONNECT_DP_ON_DDI_0
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@ -53,12 +53,25 @@ config CHROMEOS
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# Use default libpayload config
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select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE
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if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
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config EFS_SPI_READ_MODE
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default 0 if EM100 # Normal read mode
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default 3 # Quad IO (1-1-4)
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default 3 # Quad IO (1-1-4)
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config EFS_SPI_SPEED
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default 3 if EM100 # 16.66 MHz
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default 0 # 66.66 MHz
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default 0 # 66MHz
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config EFS_SPI_MICRON_FLAG
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default 0
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config NORMAL_READ_SPI_SPEED
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default 1 # 33MHz
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config ALT_SPI_SPEED
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default 1 # 33MHz
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config TPM_SPI_SPEED
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default 1 # 33MHz
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endif # !EM100
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endif # BOARD_AMD_MAJOLICA
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@ -124,20 +124,25 @@ config VGA_BIOS_DGPU_FILE
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default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin" if BOARD_AMD_MANDOLIN
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default "3rdparty/amd_blobs/picasso/Raven2GenericVbios.bin" if BOARD_AMD_CEREME
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if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
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config EFS_SPI_READ_MODE
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int
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default 0 if EM100
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default 0 if BOARD_AMD_CEREME
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default 3
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default 3 # Quad IO (1-1-4)
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config EFS_SPI_SPEED
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int
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default 3 if EM100
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default 1 if BOARD_AMD_CEREME
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default 0
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default 0 # 66MHz
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config EFS_SPI_MICRON_FLAG
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int
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default 0
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config NORMAL_READ_SPI_SPEED
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default 1 # 33MHz
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config ALT_SPI_SPEED
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default 1 # 33MHz
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config TPM_SPI_SPEED
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default 1 # 33MHz
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endif # !EM100
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endif # BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME
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@ -94,15 +94,23 @@ config AMDFW_CONFIG_FILE
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string
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default "src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg"
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if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
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config EFS_SPI_READ_MODE
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int
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default 0 if EM100 # Normal read mode
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default 4 # Dual IO (1-2-2)
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config EFS_SPI_SPEED
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int
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default 3 if EM100 # 16.66 MHz
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default 1 # 33.33 MHz
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default 0 # 66MHz
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config EFS_SPI_MICRON_FLAG
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default 0
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config NORMAL_READ_SPI_SPEED
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default 1 # 33MHz
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config ALT_SPI_SPEED
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default 0 # 66MHz
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endif # !EM100
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config VARIANT_DIR
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default "guybrush" if BOARD_GOOGLE_GUYBRUSH
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@ -245,20 +245,27 @@ config VARIANT_MAX_BOARD_ID_BROKEN_FMPCU_POWER
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help
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Last board version that needs the extra delay for FPMCU init.
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if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
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config EFS_SPI_READ_MODE
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int
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default 0 if EM100 # Normal read mode
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default 2 # Dual IO (1-1-2)
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default 4 # Dual IO (1-2-2)
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config EFS_SPI_SPEED
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int
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default 3 if EM100 # 16.66 MHz
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default 0 # 66.66 MHz
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default 0 # 66MHz
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config EFS_SPI_MICRON_FLAG
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int
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default 0
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config NORMAL_READ_SPI_SPEED
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default 1 # 33MHz
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config ALT_SPI_SPEED
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default 0 # 66MHz
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config TPM_SPI_SPEED
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default 0 # 66MHz
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endif # !EM100
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config CHROMEOS_WIFI_SAR
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bool
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default y if CHROMEOS
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