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nb/x4x/raminit.c: Remove ME locking code 

This code ought not to run if ME is disabled. It also prohibits
writing to some GMCH regs like GGC bit1.

Intel ® 4 Series Chipset Family datasheet refers to this as
"ME stolen Memory lock" without actually describing this
functionality.

Change-Id: Iaa8646e535e13c44c010ccd434a5af954cf7dfbc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans 2017-02-27 16:27:21 +01:00 committed by Nico Huber
parent 0edf5dc331
commit ddc8828697
1 changed files with 12 additions and 8 deletions
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12
src/northbridge/intel/x4x/raminit_ddr2.c
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@ -2106,15 +2106,19 @@ void raminit_ddr2(struct sysinfo *s)
printk(BIOS_DEBUG, "Done power settings\n");
// ME related
/*
* FIXME: This locks some registers like bit1 of GGC
* and is only needed in case of ME being used.
*/
if (ME_UMA_SIZEMB != 0) {
if (RANK_IS_POPULATED(s->dimms, 0, 0)
|| RANK_IS_POPULATED(s->dimms, 1, 0)) {
|| RANK_IS_POPULATED(s->dimms, 1, 0))
MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
}
if (RANK_IS_POPULATED(s->dimms, 0, 1)
|| RANK_IS_POPULATED(s->dimms, 1, 1)) {
|| RANK_IS_POPULATED(s->dimms, 1, 1))
MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
}
MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
}
printk(BIOS_DEBUG, "Done ddr2\n");
}