drivers/intel/fsp1_1/romstage.c: Remove MCU update

On Braswell this is done in the bootblock before C code is executed.

Change-Id: I72c7b821e04169ae237d8adb6a8348f06e87b047
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Arthur Heymans 2021-05-29 07:01:10 +02:00 committed by Felix Held
parent 7266c5ec84
commit de374e5028
1 changed files with 0 additions and 4 deletions

View File

@ -103,10 +103,6 @@ void cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
timestamp_add_now(TS_START_ROMSTAGE); timestamp_add_now(TS_START_ROMSTAGE);
/* Load microcode before RAM init */
if (CONFIG(SUPPORT_CPU_UCODE_IN_CBFS))
intel_update_microcode_from_cbfs();
/* Display parameters */ /* Display parameters */
if (!CONFIG(NO_MMCONF_SUPPORT)) if (!CONFIG(NO_MMCONF_SUPPORT))
printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n", printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",