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mb/purism/librem_14: Enable both lanes of left side USB 3.0 port 

Fixes using USB-C devices in either orientation on left-side USB-C
port.

Test: Plug USB-C device in both orientations on left-side USB-C port,
check speed with lsusb -t.

Change-Id: I9fbc53bb51a5225e92b0b6bb9ced87a0ab90c9ce
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69702
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jonathon Hall 2022-11-16 09:51:25 -05:00 committed by Felix Held
parent 13e151f31c
commit def33cc5bb
1 changed files with 1 additions and 0 deletions
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1
src/mainboard/purism/librem_cnl/variants/librem_14/overridetree.cb
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@ -127,6 +127,7 @@ chip soc/intel/cannonlake
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A right register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-A right
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A left register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-A left
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-C right register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-C right
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # Type-C left
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card Reader register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card Reader
end end