aopen/dxplplusu,intel/i82801dx: Select COMMON_FADT

Move existing fadt.c file under southbridge.

Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41923
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2020-05-30 14:50:50 +03:00 committed by Felix Held
parent e5f4b2f39d
commit df63ff8b55
3 changed files with 4 additions and 21 deletions

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@ -3,6 +3,7 @@
config SOUTHBRIDGE_INTEL_I82801DX config SOUTHBRIDGE_INTEL_I82801DX
bool bool
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select COMMON_FADT
select IOAPIC select IOAPIC
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS

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@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801DX),y)
ramstage-y += i82801dx.c ramstage-y += i82801dx.c
ramstage-y += ac97.c ramstage-y += ac97.c
ramstage-y += fadt.c
ramstage-y += ide.c ramstage-y += ide.c
ramstage-y += lpc.c ramstage-y += lpc.c
#ramstage-y += pci.c #ramstage-y += pci.c

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@ -17,24 +17,11 @@
#define S4_BIOS 0x77 #define S4_BIOS 0x77
#define GNVS_UPDATE 0xea #define GNVS_UPDATE 0xea
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) void acpi_fill_fadt(acpi_fadt_t *fadt)
{ {
acpi_header_t *header = &(fadt->header);
u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe; u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
memset((void *) fadt, 0, sizeof(acpi_fadt_t)); fadt->preferred_pm_profile = PM_UNSPECIFIED;
memcpy(header->signature, "FACP", 4);
header->length = sizeof(acpi_fadt_t);
header->revision = get_acpi_table_revision(FADT);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (unsigned long) facs;
fadt->dsdt = (unsigned long) dsdt;
fadt->reserved = 0;
fadt->preferred_pm_profile = 0; /* PM_MOBILE; */
fadt->sci_int = 0x9; fadt->sci_int = 0x9;
@ -85,10 +72,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->reset_reg.addrh = 0x0; fadt->reset_reg.addrh = 0x0;
fadt->reset_value = 0; fadt->reset_value = 0;
fadt->x_firmware_ctl_l = (unsigned long)facs;
fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (unsigned long)dsdt;
fadt->x_dsdt_h = 0;
fadt->x_pm1a_evt_blk.space_id = 1; fadt->x_pm1a_evt_blk.space_id = 1;
fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_width = 32;
@ -145,6 +128,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.access_size = 0;
fadt->x_gpe1_blk.addrl = 0x0; fadt->x_gpe1_blk.addrl = 0x0;
fadt->x_gpe1_blk.addrh = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
header->checksum = acpi_checksum((void *) fadt, header->length);
} }