aopen/dxplplusu,intel/i82801dx: Select COMMON_FADT
Move existing fadt.c file under southbridge. Change-Id: Ie2fdc715e4d1af347d25b51e83189f28cd9af014 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41923 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -3,6 +3,7 @@
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config SOUTHBRIDGE_INTEL_I82801DX
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config SOUTHBRIDGE_INTEL_I82801DX
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bool
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bool
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select COMMON_FADT
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select IOAPIC
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select IOAPIC
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select HAVE_SMI_HANDLER
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select HAVE_SMI_HANDLER
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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select SOUTHBRIDGE_INTEL_COMMON_SMBUS
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@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801DX),y)
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ramstage-y += i82801dx.c
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ramstage-y += i82801dx.c
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ramstage-y += ac97.c
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ramstage-y += ac97.c
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ramstage-y += fadt.c
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ramstage-y += ide.c
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ramstage-y += ide.c
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ramstage-y += lpc.c
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ramstage-y += lpc.c
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#ramstage-y += pci.c
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#ramstage-y += pci.c
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@ -17,24 +17,11 @@
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#define S4_BIOS 0x77
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#define S4_BIOS 0x77
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#define GNVS_UPDATE 0xea
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#define GNVS_UPDATE 0xea
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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{
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acpi_header_t *header = &(fadt->header);
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u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
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u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
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memset((void *) fadt, 0, sizeof(acpi_fadt_t));
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fadt->preferred_pm_profile = PM_UNSPECIFIED;
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = get_acpi_table_revision(FADT);
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = asl_revision;
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fadt->firmware_ctrl = (unsigned long) facs;
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fadt->dsdt = (unsigned long) dsdt;
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fadt->reserved = 0;
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fadt->preferred_pm_profile = 0; /* PM_MOBILE; */
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fadt->sci_int = 0x9;
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fadt->sci_int = 0x9;
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@ -85,10 +72,6 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_value = 0;
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fadt->reset_value = 0;
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fadt->x_firmware_ctl_l = (unsigned long)facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = (unsigned long)dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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@ -145,6 +128,4 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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fadt->x_gpe1_blk.access_size = 0;
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fadt->x_gpe1_blk.access_size = 0;
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fadt->x_gpe1_blk.addrl = 0x0;
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fadt->x_gpe1_blk.addrl = 0x0;
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fadt->x_gpe1_blk.addrh = 0x0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *) fadt, header->length);
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}
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}
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