mb/prodrive/atlas: Fix SMBUS/SPD addresses

Commit 0e7cf3d81d (soc/intel/alderlake:
Fix DDR5 channel mapping) fixed a bug in SoC code that messed up DDR5
SPD address mapping. Atlas uses the 0x50/0x52 addresses. However, the
SoC code bug required commit 044883615d
(mb/prodrive/atlas: Update correct SPD address) so that at least some
RAM would work. Now that the SoC code bug is fixed, the workaround is
no longer needed, so use the correct SPD address mapping.

TEST=Boot Atlas and verify that both memory channels work

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I352d8f36eec63cffd3f63ab6e7421db16ca30163
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/prodrive/atlas/romstage_fsp_params.c

@@ -35,9 +35,11 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 	const struct mem_spd dimm_module_spd_info = {
 		.topo = MEM_TOPO_DIMM_MODULE,
 		.smbus = {
-			[3] = {
+			[0] = {
+				.addr_dimm[0] = 0x50,
+			},
+			[1] = {
 				.addr_dimm[0] = 0x52,
-				.addr_dimm[1] = 0x53,
 			},
 		},
 	};