mb/google/rex: Enable S0ix

This patch enables S0ix for Google/Rex platform.

BUG=b:256807255
TEST=Able to program FADT table Bit 21 (Low Power Idle S0)

Change-Id: I79546267d29622c65321f7dfa29d3aac2fa59438
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70430
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2022-12-06 23:56:29 +05:30
parent 951fb00d4e
commit e0d497a3b6
1 changed files with 3 additions and 0 deletions

View File

@ -11,6 +11,9 @@ chip soc/intel/meteorlake
# EC memory map range is 0x900-0x9ff # EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901" register "gen3_dec" = "0x00fc0901"
# S0ix enable
register "s0ix_enable" = "1"
# Enable CNVi BT # Enable CNVi BT
register "cnvi_bt_core" = "true" register "cnvi_bt_core" = "true"