mb/google/rex: Enable S0ix
This patch enables S0ix for Google/Rex platform. BUG=b:256807255 TEST=Able to program FADT table Bit 21 (Low Power Idle S0) Change-Id: I79546267d29622c65321f7dfa29d3aac2fa59438 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70430 Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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@ -11,6 +11,9 @@ chip soc/intel/meteorlake
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# EC memory map range is 0x900-0x9ff
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# EC memory map range is 0x900-0x9ff
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register "gen3_dec" = "0x00fc0901"
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register "gen3_dec" = "0x00fc0901"
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# S0ix enable
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register "s0ix_enable" = "1"
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# Enable CNVi BT
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# Enable CNVi BT
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register "cnvi_bt_core" = "true"
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register "cnvi_bt_core" = "true"
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