soc/mediatek/mt8195: complete devapc settings
In previous patch (CB:56764), only basic settings were added. Now complete devapc settings on MT8195. 1. Update permission setting 2. Updtate master domain setting: - domain 1: PCIE0, PCIE1 - domain 2: SPM, SSPM, CPU_EB 3. Set domain remap - MMSYS (4-bit to 2-bit) - TINYSYS (4-bit to 3-bit) - TINYSYS (3-bit to 4-bit) - TINYSYS to EMI (3-bit to 4-bit) - INFRA2 (3-bit to 4-bit) 4. Set SCP domain and ADSP domain - domain 3: SCP - domain 4: ADSP BUG=b:204347737 TEST=sanity test pass Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59746 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nina Wu
Patrick Georgi
parent
93f50b35a4
commit
e138fbd794
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@ -7,7 +7,7 @@
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static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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/* 0 */
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DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-1",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-2",
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@ -15,26 +15,26 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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DAPC_INFRA_AO_SYS0_ATTR("SPM_APB_S-4",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION3, FORBIDDEN11),
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DAPC_INFRA_AO_SYS0_ATTR("APMIXEDSYS_APB_S-1",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION3, FORBIDDEN11),
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DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_APB_S",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("INFRACFG_AO_MEM_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN11),
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DAPC_INFRA_AO_SYS0_ATTR("PERICFG_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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/* 10 */
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DAPC_INFRA_AO_SYS0_ATTR("GPIO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION2, FORBIDDEN12),
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DAPC_INFRA_AO_SYS0_ATTR("TOPRGU_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("DSP_IRQ_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN11),
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DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_INFRA_AO_APB_S",
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SEC_RW_ONLY, FORBIDDEN15),
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SEC_RW_ONLY, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("BCRM_INFRA_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_INFRA_AO_APB_S",
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@ -42,16 +42,14 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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DAPC_INFRA_AO_SYS0_ATTR("AP_CIRQ_EINT_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("PMIC_WRAP_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("KP_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("TOP_MISC_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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/* 20 */
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DAPC_INFRA_AO_SYS0_ATTR("DVFSRC_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("MBIST_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("HDMI_CEC_APB_S",
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@ -63,19 +61,16 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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DAPC_INFRA_AO_SYS0_ATTR("IRRX_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("SYS_TIMER_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("MODEM_TEMP_SHARE_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("PMIF1_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("PMICSPI_MST_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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/* 30 */
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DAPC_INFRA_AO_SYS0_ATTR("TIA_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("TOPCKGEN_INFRA_CFG_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("DRM_DEBUG_TOP_APB_S",
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@ -91,15 +86,14 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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DAPC_INFRA_AO_SYS0_ATTR("SECURITY_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("SPMI_MST_APB_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
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FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("DEBUG_CTRL_FMEM_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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/* 40 */
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DAPC_INFRA_AO_SYS0_ATTR("BCRM_FMEM_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("DEVICE_APC_FMEM_AO_APB_S",
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SEC_RW_ONLY, FORBIDDEN15),
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SEC_RW_ONLY, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("PWM_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("PMSR_APB_S",
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@ -141,13 +135,13 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-1",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-2",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-3",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("MCUSYS_CFGREG_APB_S-4",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("L3C_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("L3C_S-1",
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@ -160,11 +154,11 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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NO_PROTECTION, FORBIDDEN15),
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/* 70 */
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DAPC_INFRA_AO_SYS0_ATTR("NNA_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_INFRA_AO_SYS0_ATTR("PCIE0_AXI_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION2, FORBIDDEN14),
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DAPC_INFRA_AO_SYS0_ATTR("PCIE1_AXI_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION2, FORBIDDEN14),
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DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB0_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_INFRA_AO_SYS0_ATTR("VIOSYS_APB1_S",
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@ -180,42 +174,42 @@ static const struct apc_infra_peri_dom_16 infra_ao_sys0_devices[] = {
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static const struct apc_infra_peri_dom_4 infra_ao_sys1_devices[] = {
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/* 0 */
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-1",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-2",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-3",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-4",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-5",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-6",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-7",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-8",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-9",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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/* 10 */
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-10",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-11",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-12",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-13",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-14",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-15",
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NO_PROTECTION, FORBIDDEN3),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-16",
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NO_PROTECTION, FORBIDDEN3),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-17",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-18",
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NO_PROTECTION, FORBIDDEN3),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-19",
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@ -232,7 +226,7 @@ static const struct apc_infra_peri_dom_4 infra_ao_sys1_devices[] = {
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-24",
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NO_PROTECTION, FORBIDDEN3),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-25",
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NO_PROTECTION, FORBIDDEN3),
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NO_PROTECTION, FORBIDDEN2, NO_PROTECTION),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-26",
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NO_PROTECTION, FORBIDDEN3),
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DAPC_INFRA_AO_SYS1_ATTR("MM_S_S-27",
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@ -1100,34 +1094,34 @@ static const struct apc_infra_peri_dom_4 infra_ao_sys2_devices[] = {
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static const struct apc_infra_peri_dom_16 peri_ao_sys0_devices[] = {
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/* 0 */
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DAPC_PERI_AO_SYS0_ATTR("DEVICE_APC_PERI_AO_APB_S",
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SEC_RW_ONLY, FORBIDDEN15),
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SEC_RW_ONLY, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("BCRM_PERI_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("DEBUG_CTRL_PERI_AO_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-1",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-2",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-3",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-4",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-5",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-6",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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/* 10 */
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-7",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-8",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-9",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("PWR_MD32_S-10",
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NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("SSUSB_S",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("SSUSB_S-1",
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@ -1135,83 +1129,79 @@ static const struct apc_infra_peri_dom_16 peri_ao_sys0_devices[] = {
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DAPC_PERI_AO_SYS0_ATTR("SSUSB_S-2",
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NO_PROTECTION, FORBIDDEN15),
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DAPC_PERI_AO_SYS0_ATTR("DEBUGSYS_APB_S",
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NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S0_APB_S-1",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN2,
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NO_PROTECTION, FORBIDDEN10),
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/* 20 */
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DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
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DAPC_PERI_AO_SYS0_ATTR("DRAMC_MD32_S1_APB_S-1",
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NO_PROTECTION, FORBIDDEN15),
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NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN2,
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NO_PROTECTION, FORBIDDEN10),
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DAPC_PERI_AO_SYS0_ATTR("NOR_AXI_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP0_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP1_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP2_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP3_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP4_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP5_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH0_TOP6_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
/* 30 */
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP0_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP1_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP2_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP3_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP4_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP5_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH1_TOP6_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP0_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP1_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP2_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
/* 40 */
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP3_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP4_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP5_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH2_TOP6_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP0_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP1_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP2_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP3_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP4_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP5_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
/* 50 */
|
||||
DAPC_PERI_AO_SYS0_ATTR("DRAMC_CH3_TOP6_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_AO_SYS0_ATTR("CCIF2_AP_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_AO_SYS0_ATTR("CCIF2_MD_APB_S",
|
||||
|
|
@ -1240,7 +1230,7 @@ static const struct apc_infra_peri_dom_16 peri_ao_sys0_devices[] = {
|
|||
static const struct apc_infra_peri_dom_8 peri_ao_sys1_devices[] = {
|
||||
/* 0 */
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-1",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-2",
|
||||
|
|
@ -1252,22 +1242,22 @@ static const struct apc_infra_peri_dom_8 peri_ao_sys1_devices[] = {
|
|||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-5",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-6",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-7",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-8",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-9",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
/* 10 */
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-10",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-11",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-12",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-13",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-14",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-15",
|
||||
|
|
@ -1275,18 +1265,18 @@ static const struct apc_infra_peri_dom_8 peri_ao_sys1_devices[] = {
|
|||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-16",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-17",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-18",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-19",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
/* 20 */
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-20",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-21",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
DAPC_PERI_AO_SYS1_ATTR("TINSYS_S-22",
|
||||
NO_PROTECTION, FORBIDDEN7),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN3),
|
||||
};
|
||||
|
||||
static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
||||
|
|
@ -1300,7 +1290,7 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB0_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB1_S",
|
||||
NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB2_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("BND_EAST_APB3_S",
|
||||
|
|
@ -1449,8 +1439,7 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_PDN_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("TRNG_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("GCPU_APB_S",
|
||||
|
|
@ -1488,10 +1477,9 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("INFRA_IOMMU_WRAP_APB4_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("EMI_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
SEC_RW_ONLY, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("DEVICE_MPU_PDN_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("APDMA_APB_S",
|
||||
|
|
@ -1520,8 +1508,7 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("PERI_SLOW_M_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("EMI_SUB_INFRA_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("EMI_MPU_SUB_INFRA_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
/* 110 */
|
||||
|
|
@ -1530,8 +1517,7 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("MBIST_PDN_SUB_INFRA_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_MEM_SUB_INFRA_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN, FORBIDDEN, NO_PROTECTION,
|
||||
FORBIDDEN12),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("BCRM_SUB_INFRA_AO_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("DEBUG_CTRL_SUB_INFRA_AO_APB_S",
|
||||
|
|
@ -1543,7 +1529,7 @@ static const struct apc_infra_peri_dom_16 peri2_ao_sys0_devices[] = {
|
|||
DAPC_PERI2_AO_SYS0_ATTR("SSC_SUB_INFRA_APB2_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("INFRACFG_AO_MEM_SUB_INFRA_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION, FORBIDDEN3, NO_PROTECTION, FORBIDDEN11),
|
||||
DAPC_PERI2_AO_SYS0_ATTR("SUB_FAKE_ENGINE_MM_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
/* 120 */
|
||||
|
|
@ -1570,9 +1556,9 @@ static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = {
|
|||
DAPC_PERI_PAR_AO_SYS0_ATTR("MSDC2_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("PCIE0_AHB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION2, FORBIDDEN14),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("PCIE1_AHB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
NO_PROTECTION2, FORBIDDEN14),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("SSUSB_P1_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
/* 10 */
|
||||
|
|
@ -1583,7 +1569,7 @@ static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = {
|
|||
DAPC_PERI_PAR_AO_SYS0_ATTR("AUXADC_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("UART0_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("UART1_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("UART2_APB_S",
|
||||
|
|
@ -1598,7 +1584,7 @@ static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = {
|
|||
NO_PROTECTION, FORBIDDEN15),
|
||||
/* 20 */
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("PERI_MBIST_PDN_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("DISP_PWM_APB_S",
|
||||
|
|
@ -1633,9 +1619,9 @@ static const struct apc_infra_peri_dom_16 peri_par_ao_sys0_devices[] = {
|
|||
DAPC_PERI_PAR_AO_SYS0_ATTR("BCRM_PERI_PAR_PDN_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("DEVICE_APC_PERI_PAR_PDN_APB_S",
|
||||
SEC_RW_ONLY, FORBIDDEN15),
|
||||
SEC_RW_ONLY, FORBIDDEN15),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("PTP_THERM_CTRL2_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN13, NO_PROTECTION, FORBIDDEN),
|
||||
NO_PROTECTION, FORBIDDEN, NO_PROTECTION, FORBIDDEN13),
|
||||
DAPC_PERI_PAR_AO_SYS0_ATTR("IIC_P2P_REMAP_APB_S",
|
||||
NO_PROTECTION, FORBIDDEN15),
|
||||
/* 40 */
|
||||
|
|
@ -1768,6 +1754,9 @@ static void dump_infra_ao_apc(uintptr_t base)
|
|||
|
||||
printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO)MAS_SEC_0: %#x\n",
|
||||
read32(getreg(base, MAS_SEC_0)));
|
||||
|
||||
printk(BIOS_DEBUG, "[DEVAPC] (INFRA_AO %#lx)DOM_REMAP_0_0: %#x\n",
|
||||
base, read32(getreg(base, DOM_REMAP_0_0)));
|
||||
}
|
||||
|
||||
static void dump_peri_ao_apc(uintptr_t base)
|
||||
|
|
@ -1818,19 +1807,91 @@ static void dump_peri_par_ao_apc(uintptr_t base)
|
|||
read32(getreg(base, MAS_SEC_0)));
|
||||
}
|
||||
|
||||
static void dump_fmem_ao(uintptr_t base)
|
||||
{
|
||||
printk(BIOS_DEBUG, "[DEVAPC] (DEVAPC_FMEM_AO_BASE %#lx)DOM_REMAP_0_0:%#x\n",
|
||||
base, read32(getreg(base, DOM_REMAP_0_0)));
|
||||
}
|
||||
|
||||
static void dump_infra2_ao_apc(uintptr_t base)
|
||||
{
|
||||
printk(BIOS_DEBUG, "[DEVAPC] (DEVAPC_INFRA2_AO_BASE %#lx)DOM_REMAP_0_0:%#x\n",
|
||||
base, read32(getreg(base, DOM_REMAP_0_0)));
|
||||
}
|
||||
|
||||
static void dump_scp_master(uintptr_t base)
|
||||
{
|
||||
printk(BIOS_DEBUG, "[DEVAPC] SCP:%#x ADSP:%#x Lock:%#x\n",
|
||||
read32(getreg(base, SCP_DOM)),
|
||||
read32(getreg(base, ADSP_DOM)),
|
||||
read32(getreg(base, ONETIME_LOCK)));
|
||||
}
|
||||
|
||||
static void infra_init(uintptr_t base)
|
||||
{
|
||||
/* Side band */
|
||||
SET32_BITFIELDS(getreg(base, MAS_SEC_0), CPU_EB_SEC, SECURE_TRANS);
|
||||
|
||||
/* Master Domain */
|
||||
SET32_BITFIELDS(getreg(base, MAS_DOM_0),
|
||||
SCP_SSPM_DOM, DOMAIN_2,
|
||||
CPU_EB_DOM, DOMAIN_2);
|
||||
|
||||
/* Default APC Setting */
|
||||
set_infra_ao_apc(base);
|
||||
|
||||
/*
|
||||
* Domain Remap: MMSYS slave domain remap (4-bit to 2-bit)
|
||||
* 1. From domain 0 to domain 0 (no protection for all)
|
||||
* 2. From domain 1, 2, 4, 5 to domain 1 (forbidden for all)
|
||||
* 3. From domain 3 to domain 3
|
||||
* 4. others from XXX to domain 0
|
||||
*/
|
||||
SET32_BITFIELDS(getreg(base, DOM_REMAP_2_0),
|
||||
TWO_BIT_DOM_REMAP_0, DOMAIN_0,
|
||||
TWO_BIT_DOM_REMAP_1, DOMAIN_1,
|
||||
TWO_BIT_DOM_REMAP_2, DOMAIN_1,
|
||||
TWO_BIT_DOM_REMAP_3, DOMAIN_3,
|
||||
TWO_BIT_DOM_REMAP_4, DOMAIN_1,
|
||||
TWO_BIT_DOM_REMAP_5, DOMAIN_1);
|
||||
/*
|
||||
* Domain Remap: TINYSYS (3-bit to 4-bit)
|
||||
* 1. SCP from 3 to 3
|
||||
* 2. DSP from 4 to 4
|
||||
* 3. others from XXX to 15
|
||||
*/
|
||||
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
|
||||
FOUR_BIT_DOM_REMAP_0, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_1, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_2, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_3, DOMAIN_3,
|
||||
FOUR_BIT_DOM_REMAP_4, DOMAIN_4,
|
||||
FOUR_BIT_DOM_REMAP_5, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_6, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_7, DOMAIN_15);
|
||||
}
|
||||
|
||||
static void peri_init(uintptr_t base)
|
||||
{
|
||||
/* Default APC Setting */
|
||||
set_peri_ao_apc(base);
|
||||
|
||||
/* Master Domain */
|
||||
SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, DOMAIN_2);
|
||||
|
||||
/*
|
||||
* Domain Remap: TINYSYS slave domain remap (4-bit to 3-bit)
|
||||
* 1. From domain 0 to domain 0 (no protection for all)
|
||||
* 2. From domain 1 ~ 5 to domain 1 ~ 5
|
||||
* 3. others from XXX to domain 0 (no protection for all)
|
||||
*/
|
||||
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
|
||||
THREE_BIT_DOM_REMAP_0, DOMAIN_0,
|
||||
THREE_BIT_DOM_REMAP_1, DOMAIN_1,
|
||||
THREE_BIT_DOM_REMAP_2, DOMAIN_2,
|
||||
THREE_BIT_DOM_REMAP_3, DOMAIN_3,
|
||||
THREE_BIT_DOM_REMAP_4, DOMAIN_4,
|
||||
THREE_BIT_DOM_REMAP_5, DOMAIN_5);
|
||||
}
|
||||
|
||||
static void peri2_init(uintptr_t base)
|
||||
|
|
@ -1850,10 +1911,56 @@ static void peri_par_init(uintptr_t base)
|
|||
SSUSB_P2_SEC, SECURE_TRANS,
|
||||
SSUSB_P3_SEC, SECURE_TRANS);
|
||||
|
||||
/* Master Domain */
|
||||
SET32_BITFIELDS(getreg(base, MAS_DOM_4),
|
||||
PCIE0_DOM, DOMAIN_1,
|
||||
PCIE1_DOM, DOMAIN_1);
|
||||
|
||||
/* Default APC Setting */
|
||||
set_peri_par_ao_apc(base);
|
||||
}
|
||||
|
||||
static void fmem_master_init(uintptr_t base)
|
||||
{
|
||||
/*
|
||||
* Domain Remap: TINYSYS to EMI (3-bit to 4-bit)
|
||||
* 1. SCP from 3 to 3
|
||||
* 2. DSP from 4 to 4
|
||||
* 3. others from XXX to 15
|
||||
*/
|
||||
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
|
||||
FOUR_BIT_DOM_REMAP_0, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_1, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_2, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_3, DOMAIN_3,
|
||||
FOUR_BIT_DOM_REMAP_4, DOMAIN_4,
|
||||
FOUR_BIT_DOM_REMAP_5, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_6, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_7, DOMAIN_15);
|
||||
}
|
||||
|
||||
static void infra2_init(uintptr_t base)
|
||||
{
|
||||
SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
|
||||
FOUR_BIT_DOM_REMAP_0, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_1, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_2, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_3, DOMAIN_3,
|
||||
FOUR_BIT_DOM_REMAP_4, DOMAIN_4,
|
||||
FOUR_BIT_DOM_REMAP_5, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_6, DOMAIN_15,
|
||||
FOUR_BIT_DOM_REMAP_7, DOMAIN_15);
|
||||
}
|
||||
|
||||
static void scp_master_init(uintptr_t base)
|
||||
{
|
||||
write32(getreg(base, SCP_DOM), DOMAIN_3);
|
||||
write32(getreg(base, ADSP_DOM), DOMAIN_4);
|
||||
|
||||
/* Let SCP_DOM and ADSP_DOM registers be read-only for security */
|
||||
write32(getreg(base, ONETIME_LOCK), 0x5);
|
||||
}
|
||||
|
||||
struct devapc_init_ops {
|
||||
uintptr_t base;
|
||||
void (*init)(uintptr_t base);
|
||||
|
|
@ -1863,6 +1970,9 @@ struct devapc_init_ops {
|
|||
{ DEVAPC_PERI_AO_BASE, peri_init, dump_peri_ao_apc },
|
||||
{ DEVAPC_PERI2_AO_BASE, peri2_init, dump_peri2_ao_apc },
|
||||
{ DEVAPC_PERI_PAR_AO_BASE, peri_par_init, dump_peri_par_ao_apc },
|
||||
{ DEVAPC_FMEM_AO_BASE, fmem_master_init, dump_fmem_ao },
|
||||
{ DEVAPC_INFRA2_AO_BASE, infra2_init, dump_infra2_ao_apc },
|
||||
{ SCP_CFG_BASE, scp_master_init, dump_scp_master },
|
||||
};
|
||||
|
||||
void dapc_init(void)
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@ enum {
|
|||
I2C_DMA_BASE = IO_PHYS + 0x00220080,
|
||||
EMI1_SUB_BASE = IO_PHYS + 0x00225000,
|
||||
EMI0_MPU_BASE = IO_PHYS + 0x00226000,
|
||||
DEVAPC_INFRA2_AO_BASE = IO_PHYS + 0x00228000,
|
||||
DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000,
|
||||
INFRA_TRACKER_BASE = IO_PHYS + 0x00314000,
|
||||
SSPM_SRAM_BASE = IO_PHYS + 0x00400000,
|
||||
|
|
|
|||
|
|
@ -17,10 +17,17 @@ enum devapc_ao_offset {
|
|||
DOM_REMAP_1_1 = 0x814,
|
||||
DOM_REMAP_2_0 = 0x820,
|
||||
MAS_DOM_0 = 0x0900,
|
||||
MAS_DOM_4 = 0x0910,
|
||||
MAS_SEC_0 = 0x0A00,
|
||||
AO_APC_CON = 0x0F00,
|
||||
};
|
||||
|
||||
enum scp_offset {
|
||||
SCP_DOM = 0xA5080,
|
||||
ADSP_DOM = 0xA5088,
|
||||
ONETIME_LOCK = 0xA5104,
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* STRUCTURE DEFINITION
|
||||
******************************************************************************/
|
||||
|
|
@ -96,18 +103,23 @@ struct apc_infra_peri_dom_4 {
|
|||
PERM_ATTR12, PERM_ATTR13, \
|
||||
PERM_ATTR14, PERM_ATTR15)
|
||||
|
||||
#define NO_PROTECTION2 NO_PROTECTION, NO_PROTECTION
|
||||
#define NO_PROTECTION3 NO_PROTECTION2, NO_PROTECTION
|
||||
|
||||
#define FORBIDDEN2 FORBIDDEN, FORBIDDEN
|
||||
#define FORBIDDEN3 FORBIDDEN, FORBIDDEN, FORBIDDEN
|
||||
#define FORBIDDEN7 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN
|
||||
#define FORBIDDEN12 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
#define FORBIDDEN10 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN
|
||||
#define FORBIDDEN13 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN
|
||||
#define FORBIDDEN11 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN, FORBIDDEN
|
||||
#define FORBIDDEN15 FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, \
|
||||
FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN
|
||||
FORBIDDEN
|
||||
#define FORBIDDEN12 FORBIDDEN11, FORBIDDEN
|
||||
#define FORBIDDEN13 FORBIDDEN12, FORBIDDEN
|
||||
#define FORBIDDEN14 FORBIDDEN13, FORBIDDEN
|
||||
#define FORBIDDEN15 FORBIDDEN14, FORBIDDEN
|
||||
|
||||
enum devapc_sys_dom_num {
|
||||
DOM_NUM_INFRA_AO_SYS0 = 16,
|
||||
|
|
@ -144,6 +156,10 @@ enum devapc_cfg_index {
|
|||
DEFINE_BIT(CPU_EB_SEC, 1)
|
||||
|
||||
DEFINE_BITFIELD(CPU_EB_DOM, 11, 8) /* 1 */
|
||||
DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16) /* 2 */
|
||||
|
||||
/* PERI */
|
||||
DEFINE_BITFIELD(SPM_DOM, 11, 8) /* 1 */
|
||||
|
||||
/* PERI_PAR */
|
||||
DEFINE_BIT(SSUSB_SEC, 21)
|
||||
|
|
@ -153,6 +169,9 @@ DEFINE_BIT(SSUSB_P1_1_SEC, 2)
|
|||
DEFINE_BIT(SSUSB_P2_SEC, 3)
|
||||
DEFINE_BIT(SSUSB_P3_SEC, 4)
|
||||
|
||||
DEFINE_BITFIELD(PCIE0_DOM, 11, 8) /* 17 */
|
||||
DEFINE_BITFIELD(PCIE1_DOM, 19, 16) /* 18 */
|
||||
|
||||
/* Domain Remap */
|
||||
DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_0, 3, 0)
|
||||
DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_1, 7, 4)
|
||||
|
|
@ -168,11 +187,13 @@ DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_1, 5, 3)
|
|||
DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_2, 8, 6)
|
||||
DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_3, 11, 9)
|
||||
DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_4, 14, 12)
|
||||
DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_5, 17, 15)
|
||||
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8)
|
||||
DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_5, 11, 10)
|
||||
|
||||
#endif /* SOC_MEDIATEK_MT8195_DEVAPC_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue