mb/google/octopus/var/meep: Update GPIO config for meep

The change updates GPIO configuration for meep.

1. Update touchscreen power enable GPIO in devicetree.
2. Provide default override tables for GPIO configuration.

BUG=b:112955087
TEST=Boot on meep proto board with Intel (Jefferson Peak) wifi card.

Change-Id: Idb4e7a510eef15c2e118058d5848080782f4f665
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/28252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Wisley Chen 2018-08-21 21:06:56 +08:00 committed by Aaron Durbin
parent e6c8f7ec20
commit e166ea4d2a
3 changed files with 80 additions and 1 deletions

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@ -0,0 +1,3 @@
bootblock-y += gpio.c
ramstage-y += gpio.c

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@ -0,0 +1,76 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <gpio.h>
#include <soc/gpio.h>
static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_104, UP_20K),
/* CAM_SOC_EC_SYNC */
PAD_CFG_GPI_APIC_IOS(GPIO_134, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD),
/* EN_PP3300_WLAN_L */
PAD_CFG_GPO(GPIO_178, 0, DEEP),
};
const struct pad_config *variant_override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(default_override_table);
return default_override_table;
}
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
/* PCH_WP_OD */
PAD_CFG_GPI(GPIO_190, NONE, DEEP),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,
DISPUPD),
/* H1_SLAVE_SPI_CLK_R */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CS_L_R */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
PAD_CFG_GPO(GPIO_178, 0, DEEP),
/* WLAN_PE_RST */
PAD_CFG_GPO(GPIO_164, 0, DEEP),
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}

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@ -49,7 +49,7 @@ chip soc/intel/apollolake
register "probed" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
register "reset_delay_ms" = "20"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_213)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
device i2c 10 on end