sb/intel/i82371eb/chip.h: Use 'bool' instead of 'int'
This to fix following error using Clang-16.0.0: CC romstage/mainboard/emulation/qemu-i440fx/static.o build/mainboard/emulation/qemu-i440fx/static.c:31:17: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .ide0_enable = 1, ^ build/mainboard/emulation/qemu-i440fx/static.c:32:17: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion] .ide1_enable = 1, ^ Change-Id: I36cc19bc2908119fe940941e108ee217a7b26f50 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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@ -42,14 +42,14 @@ chip northbridge/intel/i440bx # Northbridge
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device pci 4.1 on end # IDE
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device pci 4.1 on end # IDE
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device pci 4.2 on end # USB
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device pci 4.2 on end # USB
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device pci 4.3 on end # ACPI
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device pci 4.3 on end # ACPI
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register "ide0_enable" = "1"
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register "ide0_enable" = "true"
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register "ide1_enable" = "1"
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register "ide1_enable" = "true"
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register "ide_legacy_enable" = "1"
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register "ide_legacy_enable" = "true"
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# Enable UDMA/33 for higher speed if your IDE device(s) support it.
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# Enable UDMA/33 for higher speed if your IDE device(s) support it.
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register "ide0_drive0_udma33_enable" = "1"
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register "ide0_drive0_udma33_enable" = "true"
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register "ide0_drive1_udma33_enable" = "1"
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register "ide0_drive1_udma33_enable" = "true"
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register "ide1_drive0_udma33_enable" = "1"
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register "ide1_drive0_udma33_enable" = "true"
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register "ide1_drive1_udma33_enable" = "1"
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register "ide1_drive1_udma33_enable" = "true"
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register "thrm_polarity" = "1"
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register "thrm_polarity" = "1"
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register "lid_polarity" = "1"
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register "lid_polarity" = "1"
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end
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end
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@ -6,8 +6,8 @@ chip mainboard/emulation/qemu-i440fx
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device pci 01.0 on end # ISA bridge
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device pci 01.0 on end # ISA bridge
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device pci 01.1 on end # IDE
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device pci 01.1 on end # IDE
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device pci 01.3 on end # ACPI
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device pci 01.3 on end # ACPI
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register "ide0_enable" = "1"
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register "ide0_enable" = "true"
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register "ide1_enable" = "1"
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register "ide1_enable" = "true"
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register "gpo" = "0x7fffbbff"
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register "gpo" = "0x7fffbbff"
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end
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end
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end
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end
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@ -4,17 +4,18 @@
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#define SOUTHBRIDGE_INTEL_I82371EB_CHIP_H
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#define SOUTHBRIDGE_INTEL_I82371EB_CHIP_H
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#include <device/device.h>
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#include <device/device.h>
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#include <types.h>
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struct southbridge_intel_i82371eb_config {
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struct southbridge_intel_i82371eb_config {
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int ide0_enable:1;
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bool ide0_enable;
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int ide0_drive0_udma33_enable:1;
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bool ide0_drive0_udma33_enable;
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int ide0_drive1_udma33_enable:1;
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bool ide0_drive1_udma33_enable;
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int ide1_enable:1;
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bool ide1_enable;
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int ide1_drive0_udma33_enable:1;
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bool ide1_drive0_udma33_enable;
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int ide1_drive1_udma33_enable:1;
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bool ide1_drive1_udma33_enable;
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int ide_legacy_enable:1;
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bool ide_legacy_enable;
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int usb_enable:1;
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bool usb_enable;
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int gpo22_enable:1; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
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bool gpo22_enable; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
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int gpo22:1;
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int gpo22:1;
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int gpo23:1;
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int gpo23:1;
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/* acpi */
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/* acpi */
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