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sb/intel/i82371eb/chip.h: Use 'bool' instead of 'int' 

This to fix following error using Clang-16.0.0:
 CC         romstage/mainboard/emulation/qemu-i440fx/static.o
build/mainboard/emulation/qemu-i440fx/static.c:31:17: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .ide0_enable = 1,
                       ^
build/mainboard/emulation/qemu-i440fx/static.c:32:17: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .ide1_enable = 1,
                       ^

Change-Id: I36cc19bc2908119fe940941e108ee217a7b26f50
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
This commit is contained in:
Elyes Haouas 2023-03-18 18:03:37 +01:00
parent fd4e676bb3
commit e1a6ea6c48
3 changed files with 19 additions and 18 deletions
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14
src/mainboard/asus/p2b/devicetree.cb
View File

@ -42,14 +42,14 @@ chip northbridge/intel/i440bx # Northbridge
device pci 4.1 on end # IDE
device pci 4.2 on end # USB
device pci 4.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide_legacy_enable" = "1"
register "ide0_enable" = "true"
register "ide1_enable" = "true"
register "ide_legacy_enable" = "true"
# Enable UDMA/33 for higher speed if your IDE device(s) support it.
register "ide0_drive0_udma33_enable" = "1"
register "ide0_drive1_udma33_enable" = "1"
register "ide1_drive0_udma33_enable" = "1"
register "ide1_drive1_udma33_enable" = "1"
register "ide0_drive0_udma33_enable" = "true"
register "ide0_drive1_udma33_enable" = "true"
register "ide1_drive0_udma33_enable" = "true"
register "ide1_drive1_udma33_enable" = "true"
register "thrm_polarity" = "1"
register "lid_polarity" = "1"
end

4
src/mainboard/emulation/qemu-i440fx/devicetree.cb
View File

@ -6,8 +6,8 @@ chip mainboard/emulation/qemu-i440fx
device pci 01.0 on end # ISA bridge
device pci 01.1 on end # IDE
device pci 01.3 on end # ACPI
register "ide0_enable" = "1"
register "ide1_enable" = "1"
register "ide0_enable" = "true"
register "ide1_enable" = "true"
register "gpo" = "0x7fffbbff"
end
end

19
src/southbridge/intel/i82371eb/chip.h
View File

@ -4,17 +4,18 @@
#define SOUTHBRIDGE_INTEL_I82371EB_CHIP_H
#include <device/device.h>
#include <types.h>
struct southbridge_intel_i82371eb_config {
int ide0_enable:1;
int ide0_drive0_udma33_enable:1;
int ide0_drive1_udma33_enable:1;
int ide1_enable:1;
int ide1_drive0_udma33_enable:1;
int ide1_drive1_udma33_enable:1;
int ide_legacy_enable:1;
int usb_enable:1;
int gpo22_enable:1; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
bool ide0_enable;
bool ide0_drive0_udma33_enable;
bool ide0_drive1_udma33_enable;
bool ide1_enable;
bool ide1_drive0_udma33_enable;
bool ide1_drive1_udma33_enable;
bool ide_legacy_enable;
bool usb_enable;
bool gpo22_enable; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
int gpo22:1;
int gpo23:1;
/* acpi */