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AGESA boards: Use acpi_s3_resume_allowed() 

This adds use of BROKEN_CAR_MIGRATE to include CBMEM symbols for the
build of romstage also for boards without HAVE_ACPI_RESUME.
These symbols got exposed as the use of preprocessor directives was
reduced.

We expect the linker to do a fair job and optimize away function
bodies that are on unreachable execution paths.

Change-Id: Ibf5181d3eecb87ce647abe0be01072594b05aa5f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6067
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2014-06-18 09:10:53 +03:00
parent adf3d6ff52
commit e1b468e1a7
24 changed files with 25 additions and 79 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/amd/agesa/Kconfig
View File

@ -32,6 +32,7 @@ config CPU_AMD_AGESA
select TSC_SYNC_LFENCE
select UDELAY_LAPIC
select LAPIC_MONOTONIC_TIMER
select BROKEN_CAR_MIGRATE
select SPI_FLASH if HAVE_ACPI_RESUME
if CPU_AMD_AGESA

4
src/cpu/amd/agesa/Makefile.inc
View File

@ -23,8 +23,8 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15) += family15
subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) += family15tn
subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb
romstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c
romstage-y += s3_resume.c
ramstage-y += s3_resume.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc

2
src/mainboard/amd/olivehill/agesawrapper.c
View File

@ -425,7 +425,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -627,7 +626,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/amd/olivehill/romstage.c
View File

@ -92,9 +92,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -110,7 +109,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -132,7 +130,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);

2
src/mainboard/amd/parmer/agesawrapper.c
View File

@ -426,7 +426,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -630,7 +629,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/amd/parmer/romstage.c
View File

@ -76,9 +76,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -93,7 +92,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -115,7 +113,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/amd/persimmon/agesawrapper.c
View File

@ -433,7 +433,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@ -565,7 +564,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (

7
src/mainboard/amd/persimmon/romstage.c
View File

@ -102,9 +102,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@ -121,7 +120,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -143,7 +141,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/amd/thatcher/agesawrapper.c
View File

@ -423,7 +423,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -632,7 +631,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/amd/thatcher/romstage.c
View File

@ -93,9 +93,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -110,7 +109,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -132,7 +130,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/asrock/imb-a180/agesawrapper.c
View File

@ -454,7 +454,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -656,7 +655,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/asrock/imb-a180/romstage.c
View File

@ -116,9 +116,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -134,7 +133,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -156,7 +154,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);

2
src/mainboard/asus/f2a85-m/agesawrapper.c
View File

@ -438,7 +438,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -647,7 +646,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/asus/f2a85-m/romstage.c
View File

@ -141,9 +141,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -158,7 +157,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -180,7 +178,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/gizmosphere/gizmo/agesawrapper.c
View File

@ -453,7 +453,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@ -585,7 +584,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (

7
src/mainboard/gizmosphere/gizmo/romstage.c
View File

@ -110,9 +110,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@ -129,7 +128,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -151,7 +149,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
View File

@ -436,7 +436,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@ -640,7 +639,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (

7
src/mainboard/hp/pavilion_m6_1035dx/romstage.c
View File

@ -73,9 +73,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@ -90,7 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -112,7 +110,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
View File

@ -394,7 +394,6 @@ AGESA_STATUS agesawrapper_amdinitlate(void)
return status;
}
#if CONFIG_HAVE_ACPI_RESUME
AGESA_STATUS agesawrapper_amdinitresume(void)
{
AGESA_STATUS status;
@ -517,7 +516,6 @@ AGESA_STATUS agesawrapper_amdS3Save(void)
return status;
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
AGESA_STATUS agesawrapper_amdlaterunaptask (
uint32_t Func,

7
src/mainboard/jetway/nf81-t56n-lf/romstage.c
View File

@ -118,9 +118,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@ -137,7 +136,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -159,7 +157,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif /* CONFIG_HAVE_ACPI_RESUME */
post_code(0x50);
copy_and_run();

2
src/mainboard/lippert/frontrunner-af/agesawrapper.c
View File

@ -452,7 +452,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@ -584,7 +583,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (

7
src/mainboard/lippert/frontrunner-af/romstage.c
View File

@ -101,9 +101,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@ -124,7 +123,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -146,7 +144,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();

2
src/mainboard/lippert/toucan-af/agesawrapper.c
View File

@ -452,7 +452,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@ -584,7 +583,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (

7
src/mainboard/lippert/toucan-af/romstage.c
View File

@ -102,9 +102,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
#endif
int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@ -125,7 +124,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@ -147,7 +145,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x61);
prepare_for_resume();
}
#endif
post_code(0x50);
copy_and_run();