Kill a few more warnings.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/intel/d810e2cb/Kconfig

@@ -25,6 +25,8 @@ config BOARD_INTEL_D810E2CB
 	select SOUTHBRIDGE_INTEL_I82801BX
 	select SUPERIO_SMSC_SMSCSUPERIO
 	select HAVE_PIRQ_TABLE
+	select HAVE_HARD_RESET
+	select USE_WATCHDOG_ON_BOOT
 	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_512
 	select HAVE_MAINBOARD_RESOURCES

src/mainboard/kontron/986lcd-m/mptable.c

@@ -32,7 +32,6 @@ static void *smp_write_config_table(void *v)
         static const char productid[12] = "986LCD-M    ";
         struct mp_config_table *mc;
 	struct device *riser = NULL, *firewire = NULL;
-	int i;
 	int firewire_bus = 0, riser_bus = 0, isa_bus;
 	int ioapic_id;
 

src/northbridge/intel/i82810/raminit.c

@@ -365,7 +365,7 @@ Public interface.
 static void sdram_set_registers(void)
 {
 	u8 reg8;
-	u16 reg16, did;
+	u16 did;
 
 	did = pci_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID);
 

src/southbridge/intel/i82801bx/i82801bx_early_smbus.c

@@ -65,17 +65,3 @@ static inline int smbus_read_byte(unsigned device, unsigned address)
 {
 	return do_smbus_read_byte(device, address);
 }
-
-static void smbus_write_byte(unsigned device, unsigned address,
-			     unsigned char val)
-{
-	print_err("Unimplemented smbus_write_byte() called\n");
-	return;
-}
-
-static inline int smbus_write_block(unsigned device, unsigned length,
-				    unsigned cmd, unsigned data1,
-				    unsigned data2)
-{
-	return do_smbus_write_block(device, length, cmd, data1, data2);
-}

src/southbridge/intel/i82801bx/i82801bx_lpc.c

@@ -72,7 +72,7 @@ typedef struct southbridge_intel_i82801bx_config config_t;
  * specific IRQ values in your mainboards Config.lb.
 */
 
-void i82801bx_enable_apic(struct device *dev)
+static void i82801bx_enable_apic(struct device *dev)
 {
 	uint32_t reg32;
 	volatile uint32_t *ioapic_index = (volatile uint32_t *)0xfec00000;
@@ -106,7 +106,7 @@ void i82801bx_enable_apic(struct device *dev)
 	*ioapic_data = 1; /* Use Processor System Bus to deliver interrupts. */
 }
 
-void i82801bx_enable_serial_irqs(struct device *dev)
+static void i82801bx_enable_serial_irqs(struct device *dev)
 {
 	/* Set packet length and toggle silent mode bit. */
 	pci_write_config8(dev, SERIRQ_CNTL,
@@ -211,7 +211,7 @@ static void gpio_init(device_t dev)
 	pci_write_config8(dev, GPIO_CNTL, 0x10);
 }
 
-void i82801bx_rtc_init(struct device *dev)
+static void i82801bx_rtc_init(struct device *dev)
 {
 	uint8_t reg8;
 	uint32_t reg32;
@@ -231,7 +231,7 @@ void i82801bx_rtc_init(struct device *dev)
 	pci_write_config8(dev, RTC_CONF, 0x04);
 }
 
-void i82801bx_lpc_route_dma(struct device *dev, uint8_t mask)
+static void i82801bx_lpc_route_dma(struct device *dev, uint8_t mask)
 {
 	uint16_t reg16;
 	int i;

src/southbridge/intel/i82801bx/i82801bx_reset.c

@@ -19,6 +19,7 @@
  */
 
 #include <arch/io.h>
+#include <reset.h>
 
 void hard_reset(void)
 {

src/southbridge/intel/i82801bx/i82801bx_smbus.h

@@ -110,74 +110,3 @@ static int do_smbus_read_byte(unsigned device, unsigned address)
 	return byte;
 }
 
-/* This function is neither used nor tested by me (Corey Osgood), the author
-(Yinghai) probably tested/used it on i82801er */
-static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
-				unsigned data1, unsigned data2)
-{
-#warning "do_smbus_write_block is commented out"
-	print_err("Untested smbus_write_block called\n");
-#if 0
-	unsigned char global_control_register;
-	unsigned char global_status_register;
-	unsigned char byte;
-	unsigned char stat;
-	int i;
-
-	/* Clear the PM timeout flags, SECOND_TO_STS */
-	outw(inw(0x0400 + 0x66), 0x0400 + 0x66);
-
-	if (smbus_wait_until_ready(SMBUS_IO_BASE) < 0) {
-		return -2;
-	}
-
-	/* Setup transaction */
-	/* Obtain ownership */
-	outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
-	for (stat = 0; (stat & 0x40) == 0;) {
-		stat = inb(SMBUS_IO_BASE + SMBHSTSTAT);
-	}
-	/* Clear the done bit */
-	outb(0x80, SMBUS_IO_BASE + SMBHSTSTAT);
-	/* Disable interrupts */
-	outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL);
-
-	/* Set the device I'm talking too */
-	outb(((device & 0x7f) << 1), SMBUS_IO_BASE + SMBXMITADD);
-
-	/* Set the command address */
-	outb(cmd & 0xff, SMBUS_IO_BASE + SMBHSTCMD);
-
-	/* Set the block length */
-	outb(length & 0xff, SMBUS_IO_BASE + SMBHSTDAT0);
-
-	/* Try sending out the first byte of data here */
-	byte = (data1 >> (0)) & 0x0ff;
-	outb(byte, SMBUS_IO_BASE + SMBBLKDAT);
-	/* Issue a block write command */
-	outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xe3) | (0x5 << 2) | 0x40,
-	     SMBUS_IO_BASE + SMBHSTCTL);
-
-	for (i = 0; i < length; i++) {
-
-		/* Poll for transaction completion */
-		if (smbus_wait_until_blk_done(SMBUS_IO_BASE) < 0) {
-			return -3;
-		}
-
-		/* Load the next byte */
-		if (i > 3)
-			byte = (data2 >> (i % 4)) & 0x0ff;
-		else
-			byte = (data1 >> (i)) & 0x0ff;
-		outb(byte, SMBUS_IO_BASE + SMBBLKDAT);
-
-		/* Clear the done bit */
-		outb(inb(SMBUS_IO_BASE + SMBHSTSTAT),
-		     SMBUS_IO_BASE + SMBHSTSTAT);
-	}
-
-	print_debug("SMBUS Block complete\n");
-	return 0;
-#endif
-}

src/southbridge/intel/i82801bx/i82801bx_watchdog.c

@@ -22,6 +22,7 @@
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <watchdog.h>
 
 /* TODO: I'm fairly sure the same functionality is provided elsewhere. */