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northbridge/intel/i82810: Unify UDELAY selection 

Instead of manually including udelay_io.c in each romstage,
select UDELAY_IO for all i810 boards in the chipset.

Change-Id: Ifda7dcfdf37b6affce838ee96ca6382b2d4be8c3
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13784
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Stefan Reinauer 2016-02-24 13:33:45 -08:00 committed by Martin Roth
parent 63db6142b6
commit e3fd63f264
16 changed files with 3 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/asus/mew-am/Kconfig
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@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801AX select SOUTHBRIDGE_INTEL_I82801AX
select SUPERIO_SMSC_SMSCSUPERIO select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/asus/mew-am/romstage.c
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@ -22,7 +22,6 @@
#include <console/console.h> #include <console/console.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include "drivers/pc80/udelay_io.c"
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <superio/smsc/smscsuperio/smscsuperio.h> #include <superio/smsc/smscsuperio/smscsuperio.h>
#include <lib.h> #include <lib.h>

1
src/mainboard/asus/mew-vm/Kconfig
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@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_SMSC_LPC47B272 select SUPERIO_SMSC_LPC47B272
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/asus/mew-vm/romstage.c
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@ -24,7 +24,6 @@
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include "drivers/pc80/udelay_io.c"
#include <lib.h> #include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)

1
src/mainboard/ecs/p6iwp-fe/Kconfig
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@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801AX select SOUTHBRIDGE_INTEL_I82801AX
select SUPERIO_ITE_IT8712F select SUPERIO_ITE_IT8712F
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/ecs/p6iwp-fe/romstage.c
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@ -23,7 +23,6 @@
#include <console/console.h> #include <console/console.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include "drivers/pc80/udelay_io.c"
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <superio/ite/common/ite.h> #include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h> #include <superio/ite/it8712f/it8712f.h>

1
src/mainboard/hp/e_vectra_p2706t/Kconfig
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@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801AX select SOUTHBRIDGE_INTEL_I82801AX
select SUPERIO_NSC_PC87360 select SUPERIO_NSC_PC87360
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/hp/e_vectra_p2706t/romstage.c
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@ -26,7 +26,6 @@
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include "drivers/pc80/udelay_io.c"
#include <lib.h> #include <lib.h>
/* TODO: It's a PC87364 actually! */ /* TODO: It's a PC87364 actually! */

1
src/mainboard/intel/d810e2cb/Kconfig
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@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_SMSC_SMSCSUPERIO select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select USE_WATCHDOG_ON_BOOT select USE_WATCHDOG_ON_BOOT
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

2
src/mainboard/intel/d810e2cb/gpio.c
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@ -14,6 +14,8 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <delay.h>
#define PME_DEV PNP_DEV(0x4e, 0x0a) #define PME_DEV PNP_DEV(0x4e, 0x0a)
#define PME_IO_BASE_ADDR 0x800 /* Runtime register base address */ #define PME_IO_BASE_ADDR 0x800 /* Runtime register base address */

1
src/mainboard/intel/d810e2cb/romstage.c
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@ -22,7 +22,6 @@
#include <console/console.h> #include <console/console.h>
#include <southbridge/intel/i82801bx/i82801bx.h> #include <southbridge/intel/i82801bx/i82801bx.h>
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include "drivers/pc80/udelay_io.c"
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <superio/smsc/smscsuperio/smscsuperio.h> #include <superio/smsc/smscsuperio/smscsuperio.h>
#include "gpio.c" #include "gpio.c"

1
src/mainboard/mitac/6513wu/Kconfig
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@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801AX select SOUTHBRIDGE_INTEL_I82801AX
select SUPERIO_SMSC_SMSCSUPERIO select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/mitac/6513wu/romstage.c
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@ -22,7 +22,6 @@
#include <console/console.h> #include <console/console.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include "drivers/pc80/udelay_io.c"
#include <delay.h> #include <delay.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <superio/smsc/smscsuperio/smscsuperio.h> #include <superio/smsc/smscsuperio/smscsuperio.h>

1
src/mainboard/nec/powermate2000/Kconfig
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@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_I82801AX select SOUTHBRIDGE_INTEL_I82801AX
select SUPERIO_SMSC_SMSCSUPERIO select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR config MAINBOARD_DIR

1
src/mainboard/nec/powermate2000/romstage.c
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@ -24,7 +24,6 @@
#include <northbridge/intel/i82810/raminit.h> #include <northbridge/intel/i82810/raminit.h>
#include <cpu/x86/bist.h> #include <cpu/x86/bist.h>
#include <southbridge/intel/i82801ax/i82801ax.h> #include <southbridge/intel/i82801ax/i82801ax.h>
#include "drivers/pc80/udelay_io.c"
#include <lib.h> #include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)

1
src/northbridge/intel/i82810/Kconfig
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@ -17,6 +17,7 @@ config NORTHBRIDGE_INTEL_I82810
bool bool
select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_RAM_SETUP
select LATE_CBMEM_INIT select LATE_CBMEM_INIT
select UDELAY_IO
choice choice
prompt "Onboard graphics" prompt "Onboard graphics"