soc/mediatek/mt8183: Get more space for PreRAM memconsole
Leave more space for PreRAM memconsole especially for seeing complete logs when doing DRAM full calibration (that outputs in 200+k to UART): - Shrink Full-K mem space (the ELF blob today needs ~132K) - Move PRERAM_CBFS_CACHE to L2C since it's no used after DRAM is up - Shrink TIMESTAMP to 1k (all other non-MTK ARM SOCs use only 1k) - Incease PRERAM_CBMEM_CONSOLE to 63k-4 - Reordered few sections to align at better locations BUG=b:144542023 TEST=emerge-kukui coreboot chromeos-bootimage; boot and see logs Change-Id: I8696fb01653c0a581cf62e687dc523cb6fed9a32 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36859 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
parent
bcd1d1c32e
commit
e477626d82
|
@ -32,11 +32,10 @@ SECTIONS
|
|||
SRAM_START(0x00100000)
|
||||
VBOOT2_WORK(0x00100000, 12K)
|
||||
VBOOT2_TPM_LOG(0x00103000, 2K)
|
||||
PRERAM_CBMEM_CONSOLE(0x00103800, 14K)
|
||||
WATCHDOG_TOMBSTONE(0x00107000, 4)
|
||||
PRERAM_CBFS_CACHE(0x00107004, 46K - 4)
|
||||
FMAP_CACHE(0x00112800, 2K)
|
||||
TIMESTAMP(0x00113000, 4K)
|
||||
FMAP_CACHE(0x00103800, 2K)
|
||||
WATCHDOG_TOMBSTONE(0x00104000, 4)
|
||||
PRERAM_CBMEM_CONSOLE(0x00104004, 63K - 4)
|
||||
TIMESTAMP(0x00113c00, 1K)
|
||||
STACK(0x00114000, 16K)
|
||||
TTB(0x00118000, 28K)
|
||||
DMA_COHERENT(0x0011f000, 4K)
|
||||
|
@ -45,7 +44,8 @@ SECTIONS
|
|||
SRAM_L2C_START(0x00200000)
|
||||
OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x00201000, 188K)
|
||||
BOOTBLOCK(0x00230000, 64K)
|
||||
DRAM_INIT_CODE(0x00240000, 256K)
|
||||
DRAM_INIT_CODE(0x00240000, 208K)
|
||||
PRERAM_CBFS_CACHE(0x00274000, 48K)
|
||||
SRAM_L2C_END(0x00280000)
|
||||
|
||||
DRAM_START(0x40000000)
|
||||
|
|
Loading…
Reference in New Issue