soc/intel/alderlake: Use devfn_disable() function for XDCI
Use devfn_disable() for disabling a PCI device rather than using `dev->enabled = 0`. Also, use is_devfn_enabled() to get the device current state prior updating the FSP-S UPD for XDCI. TEST=FSP-S disabled XDCI when `xdci_can_enable` returns 0 and XDCI is disabled at PCI enumeration `PCI: 00:14.1: enabled 0`. Change-Id: I5e10e5d0b80986e1e73573a86a957985840fe0b3 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55727 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -82,7 +82,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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FSPS_ARCH_UPD *pfsps_arch_upd = &supd->FspsArchUpd;
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uint32_t enable_mask;
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struct device *dev;
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struct soc_intel_alderlake_config *config;
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config = config_of_soc();
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mainboard_update_soc_chip_config(config);
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@ -179,14 +178,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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pfsps_arch_upd->EnableMultiPhaseSiliconInit = 1;
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/* Enable xDCI controller if enabled in devicetree and allowed */
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dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
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if (dev) {
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if (!xdci_can_enable())
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dev->enabled = 0;
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params->XdciEnable = dev->enabled;
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} else {
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params->XdciEnable = 0;
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}
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devfn_disable(pci_root_bus(), PCH_DEVFN_USBOTG);
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params->XdciEnable = is_devfn_enabled(PCH_DEVFN_USBOTG);
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/* PCH UART selection for FSP Debug */
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params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
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