soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers

Add a function in gpio ASL library to enable/disable pad Rx/Tx Buffers.

BUG=b:123350329

Change-Id: I6c40d79debb61b0c4e96e485b410d446b77d9cf6
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/31619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Rizwan Qureshi 2019-02-26 18:12:05 +05:30 committed by Patrick Georgi
parent 51749b2766
commit e64c25ca1a
3 changed files with 52 additions and 0 deletions

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@ -94,3 +94,47 @@ Method (GPMO, 2, Serialized)
And (ShiftLeft (Arg1, GPIOPADMODE_SHIFT, Arg1), GPIOPADMODE_MASK, Arg1)
Or (Local0, Arg1, VAL0)
}
/*
* Enable/Disable Tx buffer
* Arg0 - GPIO Number
* Arg1 - TxBuffer state
* 0 = Disable Tx Buffer
* 1 = Enable Tx Buffer
*/
Method (GTXE, 2, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
If (LEqual (Arg1, 1)) {
And (Not (GPIOTXBUFDIS_MASK), VAL0, VAL0)
} ElseIf (LEqual (Arg1, 0)){
Or (GPIOTXBUFDIS_MASK, VAL0, VAL0)
}
}
/*
* Enable/Disable Rx buffer
* Arg0 - GPIO Number
* Arg1 - RxBuffer state
* 0 = Disable Rx Buffer
* 1 = Enable Rx Buffer
*/
Method (GRXE, 2, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
If (LEqual (Arg1, 1)) {
And (Not (GPIORXBUFDIS_MASK), VAL0, VAL0)
} ElseIf (LEqual (Arg1, 0)){
Or (GPIORXBUFDIS_MASK, VAL0, VAL0)
}
}

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@ -255,4 +255,8 @@
#define GPIOTXSTATE_MASK 0x1
#define GPIOPADMODE_MASK 0xC00
#define GPIOPADMODE_SHIFT 10
#define GPIOTXBUFDIS_MASK 0x100
#define GPIOTXBUFDIS_SHIFT 8
#define GPIORXBUFDIS_MASK 0x200
#define GPIORXBUFDIS_SHIFT 9
#endif

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@ -329,4 +329,8 @@
#define GPIOTXSTATE_MASK 0x1
#define GPIOPADMODE_MASK 0xC00
#define GPIOPADMODE_SHIFT 10
#define GPIOTXBUFDIS_MASK 0x100
#define GPIOTXBUFDIS_SHIFT 8
#define GPIORXBUFDIS_MASK 0x200
#define GPIORXBUFDIS_SHIFT 9
#endif