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mb/asrock/h110m: set serirq_mode to continuous mode 

By default, the LPC SIRQ mode is set to Quiet mode. Therefore, COM-port
from the SurerIO chip don't work correctly after the LPC controller (PCI
0:1f.0) initialization. Console output is broken. The patch fixes this
bug by overriding the serirq_mode option in the devicetree.cb to set
Continuous SIRQ mode

Change-Id: I37e26b271fb61f6c0343d6bf65c029924df82caf
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33801
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2019-06-26 11:17:37 +03:00 committed by Nico Huber
parent 804a0433e0
commit e6a491e782
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/asrock/h110m/devicetree.cb
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@ -62,6 +62,9 @@ chip soc/intel/skylake
register "pirqg_routing" = "PCH_IRQ11" register "pirqg_routing" = "PCH_IRQ11"
register "pirqh_routing" = "PCH_IRQ11" register "pirqh_routing" = "PCH_IRQ11"
# Set LPC Serial IRQ mode
register "serirq_mode" = "SERIRQ_CONTINUOUS"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
# SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s
register "PmConfigSlpS3MinAssert" = "0x02" register "PmConfigSlpS3MinAssert" = "0x02"