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soc/amd/stoneyridge: Create MMIO ACPI access functions 

Now that the relationship between IO access and MMIO access has been
established, create read/write functions to access ACPI standard registers
through MMIO.

BUG=b:118049037
TEST=Build grunt

Change-Id: I32c26f342885c0d99b082be98730edcf16ab5dfc
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/29295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Richard Spiegel 2018-10-30 13:24:44 -07:00 committed by Patrick Georgi
parent 0486458c73
commit e6f7c8e8cd
2 changed files with 36 additions and 0 deletions
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6
src/soc/amd/stoneyridge/include/soc/southbridge.h
View File

@ -445,6 +445,12 @@ u32 pm_read32(u8 reg);
void pm_write8(u8 reg, u8 value);
void pm_write16(u8 reg, u16 value);
void pm_write32(u8 reg, u32 value);
u8 acpi_read8(u8 reg);
u16 acpi_read16(u8 reg);
u32 acpi_read32(u8 reg);
void acpi_write8(u8 reg, u8 value);
void acpi_write16(u8 reg, u16 value);
void acpi_write32(u8 reg, u32 value);
u32 misc_read32(u8 reg);
void misc_write32(u8 reg, u32 value);
uint8_t smi_read8(uint8_t offset);

30
src/soc/amd/stoneyridge/sb_util.c
View File

@ -56,6 +56,36 @@ u32 pm_read32(u8 reg)
return read32((void *)(PM_MMIO_BASE + reg));
}
u8 acpi_read8(u8 reg)
{
return read8((void *)(ACPI_REG_MMIO_BASE + reg));
}
u16 acpi_read16(u8 reg)
{
return read16((void *)(ACPI_REG_MMIO_BASE + reg));
}
u32 acpi_read32(u8 reg)
{
return read32((void *)(ACPI_REG_MMIO_BASE + reg));
}
void acpi_write8(u8 reg, u8 value)
{
write8((void *)(ACPI_REG_MMIO_BASE + reg), value);
}
void acpi_write16(u8 reg, u16 value)
{
write16((void *)(ACPI_REG_MMIO_BASE + reg), value);
}
void acpi_write32(u8 reg, u32 value)
{
write32((void *)(ACPI_REG_MMIO_BASE + reg), value);
}
void smi_write32(uint8_t offset, uint32_t value)
{
write32((void *)(APU_SMI_BASE + offset), value);