soc/amd/common/uart: move CONSOLE_UART_BASE_ADDRESS back to SoC code

This partially reverts commit 6f8f9c969b
by moving CONSOLE_UART_BASE_ADDRESS back to the SoC-specific code, since
the number and base addresses of UARTs turned out to be rather SoC-
specific. The help text for the AMD_SOC_CONSOLE_UART option also
contained those base addresses, so remove that as well.

Change-Id: I01211ec62421c56f22ed611313d6245a05bdea67
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49372
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/block/uart/Kconfig

@@ -14,19 +14,5 @@ config AMD_SOC_CONSOLE_UART
 	select DRIVERS_UART_8250MEM_32
 	select NO_UART_ON_SUPERIO
 	select UART_OVERRIDE_REFCLK
-	help
-	  There are four memory-mapped UARTs controllers at:
-	  0: 0xfedc9000
-	  1: 0xfedca000
-	  2: 0xfedc3000
-	  3: 0xfedcf000
-
-config CONSOLE_UART_BASE_ADDRESS
-	depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
-	hex
-	default 0xfedc9000 if UART_FOR_CONSOLE = 0
-	default 0xfedca000 if UART_FOR_CONSOLE = 1
-	default 0xfedc3000 if UART_FOR_CONSOLE = 2
-	default 0xfedcf000 if UART_FOR_CONSOLE = 3
 
 endif # SOC_AMD_COMMON_BLOCK_UART

src/soc/amd/picasso/Kconfig

@@ -275,6 +275,14 @@ config PICASSO_ACPI_IO_BASE
 	help
 	  Base address for the ACPI registers.
 
+config CONSOLE_UART_BASE_ADDRESS
+	depends on CONSOLE_SERIAL && AMD_SOC_CONSOLE_UART
+	hex
+	default 0xfedc9000 if UART_FOR_CONSOLE = 0
+	default 0xfedca000 if UART_FOR_CONSOLE = 1
+	default 0xfedc3000 if UART_FOR_CONSOLE = 2
+	default 0xfedcf000 if UART_FOR_CONSOLE = 3
+
 config SMM_TSEG_SIZE
 	hex
 	default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER