drivers/mipi: Fine tune VFP, CLK and init code for IVO_T109NW41 panel

1. Adjust VFP and CLK to meet 60 +- 0.01 Hz
2. Fine tune init code for panel internal circuit

Fixes: 520137f("drivers/mipi: Add support for IVO_T109NW41 panel")

BUG=b:320892589
TEST=boot ciri with IVO_T109NW41 panel and see firmware screen

Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Change-Id: I4d7c7bd4d79301fbb6d555117d190c358bceafcc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80086
Reviewed-by: cong yang <yangcong5@huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Ruihai Zhou 2024-01-19 10:14:30 +08:00 committed by Felix Held
parent e3c507d790
commit e81109ac97
1 changed files with 9 additions and 9 deletions

View File

@ -9,11 +9,11 @@ struct panel_serializable_data IVO_T109NW41 = {
.panel_bits_per_color = 8, .panel_bits_per_color = 8,
.panel_bits_per_pixel = 24, .panel_bits_per_pixel = 24,
.mode = { .mode = {
.pixel_clock = 158400, .pixel_clock = 162600,
.lvds_dual_channel = 0, .lvds_dual_channel = 0,
.refresh = 60, .refresh = 60,
.ha = 1200, .hbl = 120, .hso = 60, .hspw = 20, .ha = 1200, .hbl = 120, .hso = 60, .hspw = 20,
.va = 1920, .vbl = 80, .vso = 60, .vspw = 8, .va = 1920, .vbl = 135, .vso = 115, .vspw = 8,
.phsync = '-', .pvsync = '-', .phsync = '-', .pvsync = '-',
.x_mm = 147, .y_mm = 235, .x_mm = 147, .y_mm = 235,
}, },
@ -21,13 +21,14 @@ struct panel_serializable_data IVO_T109NW41 = {
.init = { .init = {
PANEL_DELAY(60), PANEL_DELAY(60),
PANEL_DCS(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00), PANEL_DCS(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
PANEL_DCS(0xB1, 0x2C, 0xED, 0xED, 0x27, 0xE7, 0x52, 0xF5, 0x39, PANEL_DCS(0xB1, 0x2C, 0xED, 0xED, 0x27, 0xE7, 0x42, 0xF5, 0x39,
0x36, 0x36, 0x36, 0x36, 0x32, 0x8B, 0x11, 0x65, 0x00, 0x88, 0x36, 0x36, 0x36, 0x36, 0x32, 0x8B, 0x11, 0x65, 0x00, 0x88,
0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0xD6, 0x33), 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0xD6, 0x33),
PANEL_DCS(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x3A, 0x3C, PANEL_DCS(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C,
0xA3, 0x22, 0x20, 0x00, 0x00, 0x88, 0x01), 0xA3, 0x22, 0x20, 0x00, 0x00, 0x88, 0x01),
PANEL_DCS(0xB4, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, 0x30, 0x7A, PANEL_DCS(0xB4, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, 0x30, 0x7A,
0x30, 0x7A, 0x00, 0x9D), 0x30, 0x7A, 0x01, 0x9D),
PANEL_DCS(0xB6, 0x34, 0x34, 0x03),
PANEL_DCS(0xE9, 0xCD), PANEL_DCS(0xE9, 0xCD),
PANEL_DCS(0xBA, 0x84), PANEL_DCS(0xBA, 0x84),
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),
@ -39,8 +40,8 @@ struct panel_serializable_data IVO_T109NW41 = {
PANEL_DCS(0xE9, 0xCC), PANEL_DCS(0xE9, 0xCC),
PANEL_DCS(0xC7, 0x80), PANEL_DCS(0xC7, 0x80),
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),
PANEL_DCS(0xE9, 0xC9), PANEL_DCS(0xE9, 0xC6),
PANEL_DCS(0xC8, 0x00), PANEL_DCS(0xC8, 0x97),
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),
PANEL_DCS(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01), PANEL_DCS(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
PANEL_DCS(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x34), PANEL_DCS(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x34),
@ -48,7 +49,7 @@ struct panel_serializable_data IVO_T109NW41 = {
PANEL_DCS(0xE9, 0xC4), PANEL_DCS(0xE9, 0xC4),
PANEL_DCS(0xD0, 0x03), PANEL_DCS(0xD0, 0x03),
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),
PANEL_DCS(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF), PANEL_DCS(0xD1, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2C, 0xFF),
PANEL_DCS(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, PANEL_DCS(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08,
0x08, 0x37, 0x07, 0x64, 0x7C, 0x11, 0x11, 0x03, 0x03, 0x32, 0x08, 0x37, 0x07, 0x64, 0x7C, 0x11, 0x11, 0x03, 0x03, 0x32,
0x10, 0x0E, 0x00, 0x0E, 0x32, 0x17, 0x97, 0x07, 0x97, 0x32, 0x10, 0x0E, 0x00, 0x0E, 0x32, 0x17, 0x97, 0x07, 0x97, 0x32,
@ -93,7 +94,6 @@ struct panel_serializable_data IVO_T109NW41 = {
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),
PANEL_DCS(0xE1, 0x00), PANEL_DCS(0xE1, 0x00),
PANEL_DCS(0xBD, 0x00), PANEL_DCS(0xBD, 0x00),
PANEL_DCS(0xD2, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35),
PANEL_DCS(0xE9, 0xC4), PANEL_DCS(0xE9, 0xC4),
PANEL_DCS(0xBA, 0x96), PANEL_DCS(0xBA, 0x96),
PANEL_DCS(0xE9, 0x3F), PANEL_DCS(0xE9, 0x3F),