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mb/google/brya/var/osiris: Disable PCH USB2 phy power gating 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for osiris board. Please refer Intel doc#723158 for
more information.

BUG=None
TEST=Verify the build for osiris board

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: Ia30a7b915df14c91a2526dca3e374436da286b7a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65324
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
This commit is contained in:
David Wu 2022-06-23 09:45:11 +08:00 committed by Felix Held
parent 2e1bcd3985
commit e910fba5aa
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/google/brya/variants/osiris/overridetree.cb
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@ -11,6 +11,10 @@ end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1
register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN