smbios: Add memory type 9 system slot support
Add SMBIOS type 9 system slots into coreboot, the definiation is up to date with SMBIOS spec 3.2 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: Ibcfa377c260083203c1daf5562e103001f76b257 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -833,6 +833,41 @@ static int smbios_write_type7_cache_parameters(unsigned long *current,
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return len;
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}
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int smbios_write_type9(unsigned long *current, int *handle,
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const char *name, const enum misc_slot_type type,
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const enum slot_data_bus_bandwidth bandwidth,
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const enum misc_slot_usage usage,
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const enum misc_slot_length length,
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u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func)
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{
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struct smbios_type9 *t = (struct smbios_type9 *)*current;
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int len = sizeof(struct smbios_type9);
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memset(t, 0, sizeof(struct smbios_type9));
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t->type = SMBIOS_SYSTEM_SLOTS;
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t->handle = *handle;
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t->length = len - 2;
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if (name)
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t->slot_designation = smbios_add_string(t->eos, name);
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else
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t->slot_designation = smbios_add_string(t->eos, "SLOT");
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t->slot_type = type;
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/* TODO add slot_id supoort, will be "_SUN" for ACPI devices */
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t->slot_data_bus_width = bandwidth;
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t->current_usage = usage;
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t->slot_length = length;
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t->slot_characteristics_1 = slot_char1;
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t->slot_characteristics_2 = slot_char2;
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t->segment_group_number = 0;
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t->bus_number = bus;
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t->device_function_number = dev_func;
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t->data_bus_width = SlotDataBusWidthOther;
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len = t->length + smbios_string_table_len(t->eos);
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*current += len;
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*handle += 1;
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return len;
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}
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static int smbios_write_type11(unsigned long *current, int *handle)
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{
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@ -26,6 +26,16 @@ int smbios_add_string(u8 *start, const char *str);
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int smbios_string_table_len(u8 *start);
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/* Used by mainboard to add an on-board device */
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enum misc_slot_type;
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enum misc_slot_length;
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enum misc_slot_usage;
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enum slot_data_bus_bandwidth;
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int smbios_write_type9(unsigned long *current, int *handle,
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const char *name, const enum misc_slot_type type,
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const enum slot_data_bus_bandwidth bandwidth,
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const enum misc_slot_usage usage,
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const enum misc_slot_length length,
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u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func);
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enum smbios_bmc_interface_type;
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int smbios_write_type38(unsigned long *current, int *handle,
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const enum smbios_bmc_interface_type interface_type,
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@ -481,6 +491,146 @@ struct smbios_type7 {
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u8 eos[2];
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} __packed;
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/* System Slots - Slot Type */
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enum misc_slot_type {
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SlotTypeOther = 0x01,
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SlotTypeUnknown = 0x02,
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SlotTypeIsa = 0x03,
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SlotTypeMca = 0x04,
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SlotTypeEisa = 0x05,
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SlotTypePci = 0x06,
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SlotTypePcmcia = 0x07,
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SlotTypeVlVesa = 0x08,
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SlotTypeProprietary = 0x09,
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SlotTypeProcessorCardSlot = 0x0A,
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SlotTypeProprietaryMemoryCardSlot = 0x0B,
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SlotTypeIORiserCardSlot = 0x0C,
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SlotTypeNuBus = 0x0D,
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SlotTypePci66MhzCapable = 0x0E,
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SlotTypeAgp = 0x0F,
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SlotTypeApg2X = 0x10,
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SlotTypeAgp4X = 0x11,
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SlotTypePciX = 0x12,
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SlotTypeAgp8X = 0x13,
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SlotTypeM2Socket1_DP = 0x14,
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SlotTypeM2Socket1_SD = 0x15,
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SlotTypeM2Socket2 = 0x16,
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SlotTypeM2Socket3 = 0x17,
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SlotTypeMxmTypeI = 0x18,
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SlotTypeMxmTypeII = 0x19,
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SlotTypeMxmTypeIIIStandard = 0x1A,
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SlotTypeMxmTypeIIIHe = 0x1B,
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SlotTypeMxmTypeIV = 0x1C,
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SlotTypeMxm30TypeA = 0x1D,
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SlotTypeMxm30TypeB = 0x1E,
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SlotTypePciExpressGen2Sff_8639 = 0x1F,
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SlotTypePciExpressGen3Sff_8639 = 0x20,
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SlotTypePciExpressMini52pinWithBSKO = 0x21,
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SlotTypePciExpressMini52pinWithoutBSKO = 0x22,
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SlotTypePciExpressMini76pin = 0x23,
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SlotTypePC98C20 = 0xA0,
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SlotTypePC98C24 = 0xA1,
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SlotTypePC98E = 0xA2,
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SlotTypePC98LocalBus = 0xA3,
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SlotTypePC98Card = 0xA4,
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SlotTypePciExpress = 0xA5,
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SlotTypePciExpressX1 = 0xA6,
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SlotTypePciExpressX2 = 0xA7,
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SlotTypePciExpressX4 = 0xA8,
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SlotTypePciExpressX8 = 0xA9,
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SlotTypePciExpressX16 = 0xAA,
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SlotTypePciExpressGen2 = 0xAB,
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SlotTypePciExpressGen2X1 = 0xAC,
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SlotTypePciExpressGen2X2 = 0xAD,
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SlotTypePciExpressGen2X4 = 0xAE,
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SlotTypePciExpressGen2X8 = 0xAF,
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SlotTypePciExpressGen2X16 = 0xB0,
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SlotTypePciExpressGen3 = 0xB1,
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SlotTypePciExpressGen3X1 = 0xB2,
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SlotTypePciExpressGen3X2 = 0xB3,
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SlotTypePciExpressGen3X4 = 0xB4,
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SlotTypePciExpressGen3X8 = 0xB5,
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SlotTypePciExpressGen3X16 = 0xB6
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};
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/* System Slots - Slot Data Bus Width. */
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enum slot_data_bus_bandwidth {
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SlotDataBusWidthOther = 0x01,
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SlotDataBusWidthUnknown = 0x02,
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SlotDataBusWidth8Bit = 0x03,
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SlotDataBusWidth16Bit = 0x04,
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SlotDataBusWidth32Bit = 0x05,
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SlotDataBusWidth64Bit = 0x06,
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SlotDataBusWidth128Bit = 0x07,
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SlotDataBusWidth1X = 0x08,
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SlotDataBusWidth2X = 0x09,
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SlotDataBusWidth4X = 0x0A,
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SlotDataBusWidth8X = 0x0B,
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SlotDataBusWidth12X = 0x0C,
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SlotDataBusWidth16X = 0x0D,
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SlotDataBusWidth32X = 0x0E
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};
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/* System Slots - Current Usage. */
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enum misc_slot_usage {
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SlotUsageOther = 0x01,
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SlotUsageUnknown = 0x02,
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SlotUsageAvailable = 0x03,
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SlotUsageInUse = 0x04,
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SlotUsageUnavailable = 0x05
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};
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/* System Slots - Slot Length.*/
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enum misc_slot_length {
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SlotLengthOther = 0x01,
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SlotLengthUnknown = 0x02,
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SlotLengthShort = 0x03,
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SlotLengthLong = 0x04
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};
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/* System Slots - Slot Characteristics 1. */
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#define SMBIOS_SLOT_UNKNOWN (1 << 0)
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#define SMBIOS_SLOT_5V (1 << 1)
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#define SMBIOS_SLOT_3P3V (1 << 2)
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#define SMBIOS_SLOT_SHARED (1 << 3)
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#define SMBIOS_SLOT_PCCARD_16 (1 << 4)
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#define SMBIOS_SLOT_PCCARD_CARDBUS (1 << 5)
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#define SMBIOS_SLOT_PCCARD_ZOOM (1 << 6)
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#define SMBIOS_SLOT_PCCARD_MODEM_RING (1 << 7)
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/* System Slots - Slot Characteristics 2. */
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#define SMBIOS_SLOT_PME (1 << 0)
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#define SMBIOS_SLOT_HOTPLUG (1 << 1)
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#define SMBIOS_SLOT_SMBUS (1 << 2)
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#define SMBIOS_SLOT_BIFURCATION (1 << 3)
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struct slot_peer_groups {
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u16 peer_seg_num;
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u8 peer_bus_num;
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u8 peer_dev_fn_num;
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u8 peer_data_bus_width;
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} __packed;
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struct smbios_type9 {
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u8 type;
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u8 length;
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u16 handle;
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u8 slot_designation;
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u8 slot_type;
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u8 slot_data_bus_width;
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u8 current_usage;
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u8 slot_length;
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u16 slot_id;
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u8 slot_characteristics_1;
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u8 slot_characteristics_2;
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u16 segment_group_number;
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u8 bus_number;
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u8 device_function_number;
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u8 data_bus_width;
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u8 peer_group_count;
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struct slot_peer_groups peer[0];
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u8 eos[2];
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} __packed;
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struct smbios_type11 {
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u8 type;
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u8 length;
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