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mb/prodrive/atlas: Enable GPP_B14 buzzer support 

Per Intel doc 621483, 26.1.1 - NMI_STS_CNT, 8254 timer is required
for Speaker Data output (buzzer) at GPP_B14 NF1, as it is using
8254 timer counter 2 output. However when 8254 timer is used, S0ix
will not work as 8254 has to be gated instead. For further info on
s0ix requirements, refer to Intel doc 610002 (Modern Standby Unified
Checklist).

This CL also disables s0ix because it is not required by the
platform.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Ib5e7787a47509ed09818d8515d21a80196fb1ec6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67553
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lean Sheng Tan 2022-09-12 15:26:43 +02:00 committed by Felix Held
parent 998fdc06cb
commit e98dd0aad8
2 changed files with 12 additions and 0 deletions
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9
src/mainboard/prodrive/atlas/Kconfig
View File

@ -54,6 +54,15 @@ config CBFS_SIZE
config NO_POST config NO_POST
default y default y
config ENABLE_BUZZER_SUPPORT
bool "Enable Buzzer support"
default y
select USE_LEGACY_8254_TIMER
help
8254 timer is required for buzzer support on GPP_B14 (based on Intel doc 621483,
26.1.1 - NMI_STS_CNT). However since 8254 timer clock gating has to be enabled for
S0ix support, enabling buzzer will disable s0ix.
config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
int int
default 32 default 32

3
src/mainboard/prodrive/atlas/devicetree.cb
View File

@ -17,6 +17,9 @@ chip soc/intel/alderlake
# SaGv Configuration # SaGv Configuration
register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled" register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled"
# Disable S0ix
register "s0ix_enable" = "0"
# Display configuration (4 DPs) # Display configuration (4 DPs)
register "ddi_ports_config" = "{ register "ddi_ports_config" = "{
[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,