Documentation: x86 shadow ROM disable
Add documentation on disabling the SPI flash which is mapped (shadowed) into the x86 address space at 0x000e0000 - 0x000fffff. TEST=None Change-Id: I1d94d84c6cade97886a3274a7e7403f7b3275c5a Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/14112 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -24,6 +24,7 @@
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<li>Enable <a href="#SerialOutput">Serial Output"</a></li>
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<li>Get the <a href="#PreviousSleepState">Previous Sleep State</a></li>
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<li>Add the <a href="#MemoryInit">MemoryInit</a> Support</li>
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<li>Disable the <a href="#DisableShadowRom">Shadow ROM</a></li>
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</ol>
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</li>
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<li><a href="#Ramstage">Ramstage</a>
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@ -389,6 +390,17 @@ Use the following steps to debug the call to TempRamInit:
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</ol>
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<h2><a name="DisableShadowRom">Disable Shadow ROM</a></h2>
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<p>
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A shadow of the SPI flash part is mapped from 0x000e0000 to 0x000fffff.
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This shadow needs to be disabled to allow RAM to properly respond to
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this address range.
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</p>
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<ol>
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<li>Edit romstage/romstage.c and add the soc_after_ram_init routine</li>
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</ol>
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<hr>
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<h1><a name="Ramstage">Ramstage</a></h1>
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@ -717,6 +729,6 @@ Use the following steps to debug the call to TempRamInit:
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</table>
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<hr>
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<p>Modified: 28 February 2016</p>
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<p>Modified: 4 March 2016</p>
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</body>
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</html>
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@ -94,6 +94,9 @@
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</li>
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</ol>
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</li>
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<li>Disable the
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<a target="_blank" href="SoC/soc.html#DisableShadowRom">Shadow ROM</a>
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</li>
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<li>
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Implement the .init routine for the
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<a target="_blank" href="SoC/soc.html#ChipOperations">chip operations</a>
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@ -198,6 +201,13 @@
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for the PCI devices on the bus.
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</td>
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</tr>
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<tr>
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<td>ROM Shadow<br>0x000E0000 - 0x000FFFFF</td>
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<td>
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Disable: src/soc/<Vendor>/<Chip Family>/romstage/romstage.c/<a target="_blank" href="SoC/soc.html#DisableShadowRom">soc_after_ram_init routine</a>
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</td>
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<td>Operates as RAM: Writes followed by a read to the 0x000E0000 - 0x000FFFFF region returns the value written</td>
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</tr>
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<tr bgcolor="#c0ffc0">
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@ -346,6 +356,6 @@
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<hr>
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<p>Modified: 24 February 2016</p>
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<p>Modified: 4 March 2016</p>
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</body>
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</html>
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