mainboard/intel/cannonlake_rvp: enable NVMe SSD

Turn on PCIe express port 9 of PCIe controller 3,
to enable NVMe SSD via M.2 socket 3 on RVP board.

TEST=Boot to OS using Intel NVMe SSD Pro 6

Change-Id: I2fd1cdcf2d9718bf2042262b0c9813811a706b4a
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/21908
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bora Guvendik 2017-10-06 12:22:18 -07:00 committed by Aaron Durbin
parent 22579596ff
commit e9d8959c4f
2 changed files with 2 additions and 2 deletions

View File

@ -62,7 +62,7 @@ chip soc/intel/cannonlake
device pci 1c.5 off end # PCI Express Port 6 device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7 device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8 device pci 1c.7 off end # PCI Express Port 8
device pci 1d.0 off end # PCI Express Port 9 device pci 1d.0 on end # PCI Express Port 9
device pci 1d.1 off end # PCI Express Port 10 device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11 device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12 device pci 1d.3 off end # PCI Express Port 12

View File

@ -62,7 +62,7 @@ chip soc/intel/cannonlake
device pci 1c.5 off end # PCI Express Port 6 device pci 1c.5 off end # PCI Express Port 6
device pci 1c.6 off end # PCI Express Port 7 device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 off end # PCI Express Port 8 device pci 1c.7 off end # PCI Express Port 8
device pci 1d.0 off end # PCI Express Port 9 device pci 1d.0 on end # PCI Express Port 9
device pci 1d.1 off end # PCI Express Port 10 device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11 device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12 device pci 1d.3 off end # PCI Express Port 12