superio/ite/it8673f: Remove poor implementation

Following the reasoning of:
HASH superio/ite/it8705f: Remove poor implementation

Change-Id: Ic0722116b84acf4f3c3ef4b18b961a56f0f50718
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5568
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Edward O'Callaghan 2014-04-23 04:21:53 +10:00 committed by Patrick Georgi
parent 45b7b5af76
commit ea2900bd6c
7 changed files with 0 additions and 255 deletions

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@ -22,8 +22,6 @@ config SUPERIO_ITE_IT8661F
bool
config SUPERIO_ITE_IT8671F
bool
config SUPERIO_ITE_IT8673F
bool
config SUPERIO_ITE_IT8712F
bool
config SUPERIO_ITE_IT8716F

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@ -19,7 +19,6 @@
subdirs-y += it8661f
subdirs-y += it8671f
subdirs-y += it8673f
subdirs-y += it8712f
subdirs-y += it8716f
subdirs-y += it8718f

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@ -1,22 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ramstage-$(CONFIG_SUPERIO_ITE_IT8673F) += superio.c

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@ -1,32 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_ITE_IT8673F_CHIP_H
#define SUPERIO_ITE_IT8673F_CHIP_H
#include <device/device.h>
#include <pc80/keyboard.h>
struct superio_ite_it8673f_config {
struct pc_keyboard keyboard;
};
#endif

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@ -1,90 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include "it8673f.h"
/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
#define SIO_BASE 0x3f0
#define SIO_INDEX SIO_BASE
#define SIO_DATA (SIO_BASE + 1)
/* Global configuration registers. */
#define IT8673F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
#define IT8673F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define IT8673F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
#define IT8673F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
#define IT8673F_CONFIGURATION_PORT 0x0279 /* Write-only. */
/*
* Special values used for entering MB PnP mode. The first four bytes of
* each line determine the address port, the last four are data.
*/
static const u8 init_values[] = {
0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
};
static void it8673f_sio_write(u8 ldn, u8 index, u8 value)
{
outb(IT8673F_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(index, SIO_BASE);
outb(value, SIO_DATA);
}
/* Enable the serial port(s). */
static void it8673f_enable_serial(device_t dev, u16 iobase)
{
int i;
/* (1) Enter the configuration state (MB PnP mode). */
/* Perform MB PnP setup to put the SIO chip at 0x3f0. */
/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
outb(0x86, IT8673F_CONFIGURATION_PORT);
outb(0x80, IT8673F_CONFIGURATION_PORT);
outb(0x55, IT8673F_CONFIGURATION_PORT);
outb(0x55, IT8673F_CONFIGURATION_PORT);
/* Sequentially write the 32 special values. */
for (i = 0; i < 32; i++)
outb(init_values[i], SIO_BASE);
/* (2) Modify the data of configuration registers. */
/* Enable all devices. */
it8673f_sio_write(IT8673F_SP1, 0x30, 0x1); /* Serial port 1 */
it8673f_sio_write(IT8673F_SP2, 0x30, 0x1); /* Serial port 2 */
/* Select 24MHz CLKIN (clear bit 0). */
it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CLOCKSEL, 0x00);
/* Clear software suspend mode (clear bit 0). */
it8673f_sio_write(0x00, IT8673F_CONFIG_REG_SWSUSP, 0x00);
/* (3) Exit the configuration state (MB PnP mode). */
it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02);
}

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@ -1,34 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_ITE_IT8673F_IT8673F_H
#define SUPERIO_ITE_IT8673F_IT8673F_H
/* Datasheet: http://www.datasheet4u.com/html/I/T/8/IT8673F_ITE.pdf.html */
#define IT8673F_FDC 0x00 /* Floppy */
#define IT8673F_SP1 0x01 /* Com1 */
#define IT8673F_SP2 0x02 /* Com2 */
#define IT8673F_PP 0x03 /* Parallel port */
#define IT8673F_FAN 0x04 /* Fan controller */
#define IT8673F_KBCK 0x05 /* PS/2 keyboard */
#define IT8673F_KBCM 0x06 /* PS/2 mouse */
#endif

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@ -1,74 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include <device/pnp.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
#include "chip.h"
#include "it8673f.h"
static void init(device_t dev)
{
struct superio_ite_it8673f_config *conf = dev->chip_info;
if (!dev->enabled)
return;
switch (dev->path.pnp.device) {
case IT8673F_FDC: /* TODO. */
break;
case IT8673F_PP: /* TODO. */
break;
case IT8673F_FAN: /* TODO. */
break;
case IT8673F_KBCK:
pc_keyboard_init(&conf->keyboard);
break;
case IT8673F_KBCM: /* TODO. */
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
};
/* TODO: FDC, PP, FAN, KBCM. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, IT8673F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, IT8673F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
{ &ops, IT8673F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_ite_it8673f_ops = {
CHIP_NAME("ITE IT8673F Super I/O")
.enable_dev = enable_dev,
};