superio/ite/it8673f: Remove poor implementation
Following the reasoning of: HASH superio/ite/it8705f: Remove poor implementation Change-Id: Ic0722116b84acf4f3c3ef4b18b961a56f0f50718 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5568 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -22,8 +22,6 @@ config SUPERIO_ITE_IT8661F
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bool
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config SUPERIO_ITE_IT8671F
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bool
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config SUPERIO_ITE_IT8673F
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bool
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config SUPERIO_ITE_IT8712F
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bool
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config SUPERIO_ITE_IT8716F
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@ -19,7 +19,6 @@
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subdirs-y += it8661f
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subdirs-y += it8671f
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subdirs-y += it8673f
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subdirs-y += it8712f
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subdirs-y += it8716f
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subdirs-y += it8718f
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@ -1,22 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ramstage-$(CONFIG_SUPERIO_ITE_IT8673F) += superio.c
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@ -1,32 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_ITE_IT8673F_CHIP_H
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#define SUPERIO_ITE_IT8673F_CHIP_H
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#include <device/device.h>
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#include <pc80/keyboard.h>
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struct superio_ite_it8673f_config {
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struct pc_keyboard keyboard;
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};
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#endif
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@ -1,90 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include "it8673f.h"
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/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
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#define SIO_BASE 0x3f0
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#define SIO_INDEX SIO_BASE
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#define SIO_DATA (SIO_BASE + 1)
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/* Global configuration registers. */
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#define IT8673F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
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#define IT8673F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
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#define IT8673F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
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#define IT8673F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
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#define IT8673F_CONFIGURATION_PORT 0x0279 /* Write-only. */
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/*
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* Special values used for entering MB PnP mode. The first four bytes of
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* each line determine the address port, the last four are data.
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*/
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static const u8 init_values[] = {
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0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
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0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
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0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
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0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
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};
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static void it8673f_sio_write(u8 ldn, u8 index, u8 value)
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{
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outb(IT8673F_CONFIG_REG_LDN, SIO_BASE);
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outb(ldn, SIO_DATA);
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outb(index, SIO_BASE);
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outb(value, SIO_DATA);
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}
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/* Enable the serial port(s). */
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static void it8673f_enable_serial(device_t dev, u16 iobase)
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{
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int i;
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/* (1) Enter the configuration state (MB PnP mode). */
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/* Perform MB PnP setup to put the SIO chip at 0x3f0. */
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/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
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/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
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/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
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outb(0x86, IT8673F_CONFIGURATION_PORT);
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outb(0x80, IT8673F_CONFIGURATION_PORT);
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outb(0x55, IT8673F_CONFIGURATION_PORT);
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outb(0x55, IT8673F_CONFIGURATION_PORT);
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/* Sequentially write the 32 special values. */
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for (i = 0; i < 32; i++)
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outb(init_values[i], SIO_BASE);
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/* (2) Modify the data of configuration registers. */
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/* Enable all devices. */
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it8673f_sio_write(IT8673F_SP1, 0x30, 0x1); /* Serial port 1 */
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it8673f_sio_write(IT8673F_SP2, 0x30, 0x1); /* Serial port 2 */
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/* Select 24MHz CLKIN (clear bit 0). */
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it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CLOCKSEL, 0x00);
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/* Clear software suspend mode (clear bit 0). */
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it8673f_sio_write(0x00, IT8673F_CONFIG_REG_SWSUSP, 0x00);
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/* (3) Exit the configuration state (MB PnP mode). */
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it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02);
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}
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@ -1,34 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_ITE_IT8673F_IT8673F_H
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#define SUPERIO_ITE_IT8673F_IT8673F_H
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/* Datasheet: http://www.datasheet4u.com/html/I/T/8/IT8673F_ITE.pdf.html */
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#define IT8673F_FDC 0x00 /* Floppy */
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#define IT8673F_SP1 0x01 /* Com1 */
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#define IT8673F_SP2 0x02 /* Com2 */
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#define IT8673F_PP 0x03 /* Parallel port */
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#define IT8673F_FAN 0x04 /* Fan controller */
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#define IT8673F_KBCK 0x05 /* PS/2 keyboard */
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#define IT8673F_KBCM 0x06 /* PS/2 mouse */
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#endif
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@ -1,74 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <pc80/keyboard.h>
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#include <stdlib.h>
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#include "chip.h"
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#include "it8673f.h"
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static void init(device_t dev)
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{
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struct superio_ite_it8673f_config *conf = dev->chip_info;
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if (!dev->enabled)
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return;
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switch (dev->path.pnp.device) {
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case IT8673F_FDC: /* TODO. */
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break;
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case IT8673F_PP: /* TODO. */
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break;
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case IT8673F_FAN: /* TODO. */
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break;
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case IT8673F_KBCK:
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pc_keyboard_init(&conf->keyboard);
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break;
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case IT8673F_KBCM: /* TODO. */
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_enable,
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.init = init,
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};
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/* TODO: FDC, PP, FAN, KBCM. */
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, IT8673F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, IT8673F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
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{ &ops, IT8673F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &pnp_ops,
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ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_ite_it8673f_ops = {
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CHIP_NAME("ITE IT8673F Super I/O")
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.enable_dev = enable_dev,
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};
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