amd/torpedo cimx/sb900: Fix include directory
Change-Id: Ie472092f8926231f4e1bd1fb12839b532b4ad158 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/23279 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -18,7 +18,7 @@
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include "Hudson-2.h"
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#include <stdlib.h>
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#include <southbridge/amd/cimx/sb700/gpio_oem.h>
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#include <southbridge/amd/cimx/sb900/gpio_oem.h>
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static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
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static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr);
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@ -3,7 +3,7 @@
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/* Hudson-2 ACPI PmIO Space Define */
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#define SB_ACPI_BASE_ADDRESS 0x0400
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#define ACPI_MMIO_BASE ((u8 *)0xFED80000)
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#define VACPI_MMIO_BASE ((u8 *)0xFED80000)
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#define SB_CFG_BASE 0x000 // DWORD
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#define GPIO_BASE 0x100 // BYTE
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#define SMI_BASE 0x200 // DWORD
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@ -43,4 +43,11 @@
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#define Mmio32( BaseAddr, Register ) \
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*Mmio32Ptr( BaseAddr, Register )
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#define SB_GPIO_REG01 1
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#define SB_GPIO_REG02 2
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#define SB_GPIO_REG15 15
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#define SB_GPIO_REG24 24
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#define SB_GPIO_REG25 25
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#define SB_GPIO_REG27 27
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#endif
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