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mb/google/brask/variants/moli: enable BT offload 

Enable BT offload of NAU88L25B on Moli with fw_config NAU88L25B_I2S.

BUG=b:220814038
TEST=emerge-brask coreboot,
     Check BT offload enabled in CPU log and audio works.

Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com>
Change-Id: I72d91d2dafffa7d9604b7dd3d697cb3b2b04b152
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Casper Chang 2022-05-03 12:20:43 +08:00 committed by Felix Held
parent 1dfed8fe38
commit eb8bbb6c04
4 changed files with 64 additions and 0 deletions
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3
src/mainboard/google/brya/variants/moli/Makefile.inc
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@ -5,3 +5,6 @@ romstage-y += memory.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-y += ramstage.c ramstage-y += ramstage.c
ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-$(CONFIG_FW_CONFIG) += variant.c

44
src/mainboard/google/brya/variants/moli/fw_config.c Normal file
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@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
#include <console/console.h>
#include <fw_config.h>
#include <gpio.h>
static const struct pad_config bt_i2s_enable_pads[] = {
PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */
PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */
PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */
PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */
PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */
PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */
PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */
PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */
};
static const struct pad_config bt_i2s_disable_pads[] = {
PAD_NC(GPP_VGPIO_30, NONE),
PAD_NC(GPP_VGPIO_31, NONE),
PAD_NC(GPP_VGPIO_32, NONE),
PAD_NC(GPP_VGPIO_33, NONE),
PAD_NC(GPP_VGPIO_34, NONE),
PAD_NC(GPP_VGPIO_35, NONE),
PAD_NC(GPP_VGPIO_36, NONE),
PAD_NC(GPP_VGPIO_37, NONE),
};
static void fw_config_handle(void *unused)
{
if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
printk(BIOS_INFO, "Disable BT offload audio related GPIO pins.\n");
gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
return;
}
if (fw_config_probe(FW_CONFIG(AUDIO, NAU88L25B_I2S))) {
printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
}
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

4
src/mainboard/google/brya/variants/moli/overridetree.cb
View File

@ -9,6 +9,10 @@ fw_config
option STORAGE_NVME 1 option STORAGE_NVME 1
option STORAGE_EMMC 2 option STORAGE_EMMC 2
end end
field AUDIO 6
option AUDIO_UNKNOWN 0
option NAU88L25B_I2S 1
end
end end
chip soc/intel/alderlake chip soc/intel/alderlake
# Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2 # Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2

13
src/mainboard/google/brya/variants/moli/variant.c Normal file
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@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <chip.h>
#include <fw_config.h>
#include <baseboard/variants.h>
#include <variant/gpio.h>
#include <acpi/acpigen.h>
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
config->cnvi_bt_audio_offload = fw_config_probe(FW_CONFIG(AUDIO,
NAU88L25B_I2S));
}