mb/siemens/mc_apl1: do LPC/eSPI pad configuration at board-level

Do LPC/eSPI pad configuration at board-level to match other platforms.

Early gpio configuration was done in romstage, while LPC pads were
configured in bootblock. Instead of adding another dedicated gpio table
for bootblock, move early gpio configuration completely to bootblock on
these boards. This won't hurt, since there is no code touching the pads
in between.

The soc code gets dropped in CB:49410.

Change-Id: I2a614afb305036b0581eac8ed6a723a3f80747b3
Tested-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>

src/mainboard/siemens/mc_apl1/bootblock.c

@@ -1,9 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <baseboard/variants.h>
 #include <bootblock_common.h>
-#include <intelblocks/lpc_lib.h>
+#include <intelblocks/gpio.h>
 
 void bootblock_mainboard_init(void)
 {
-	lpc_configure_pads();
+	const struct pad_config *pads;
+	size_t num;
+
+	pads = variant_early_gpio_table(&num);
+	gpio_configure_pads(pads, num);
 }

src/mainboard/siemens/mc_apl1/romstage.c

@@ -11,15 +11,9 @@
 
 void mainboard_memory_init_params(FSPM_UPD *memupd)
 {
-	const struct pad_config *pads;
 	const struct lpddr4_swizzle_cfg *cfg;
 	const struct lpddr4_chan_swizzle_cfg *chan;
 	uint8_t spd[0x80];
-	size_t num;
-
-	/* setup early gpio before memory */
-	pads = variant_early_gpio_table(&num);
-	gpio_configure_pads(pads, num);
 
 	/*
 	 * Get DRAM configuration data from hwinfo block.

src/mainboard/siemens/mc_apl1/variants/baseboard/Makefile.inc

@@ -1,4 +1,5 @@
-romstage-y += gpio.c
+bootblock-y += gpio.c
+
 romstage-y += memory.c
 
 ramstage-y += gpio.c

src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc

@@ -1,4 +1,4 @@
-romstage-y += gpio.c
+bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += mainboard.c

src/mainboard/siemens/mc_apl1/variants/mc_apl3/Makefile.inc

@@ -1,4 +1,4 @@
-romstage-y += gpio.c
+bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += mainboard.c

src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc

@@ -1,5 +1,6 @@
+bootblock-y += gpio.c
+
 romstage-y += memory.c
-romstage-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += lcd_panel.c

src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc

@@ -1,4 +1,4 @@
-romstage-y += gpio.c
+bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += mainboard.c

src/mainboard/siemens/mc_apl1/variants/mc_apl6/Makefile.inc

@@ -1,4 +1,4 @@
-romstage-y += gpio.c
+bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += mainboard.c